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參數資料
型號: LMX2301
廠商: National Semiconductor Corporation
英文描述: PLLatinumTM 160 MHz Frequency Synthesizer for RF Personal Communications
中文描述: PLLatinumTM 160兆赫頻率合成射頻個人通信
文件頁數: 2/14頁
文件大小: 225K
代理商: LMX2301
Connection Diagram
LMX2301
TL/W/12458–2
20-Lead (0.173
×
Wide) Thin Shrink
Small Outline Package (TM)
Order Number LMX2301TM or LMX2301TMX
See NS Package Number MTC20
Pin Descriptions
Pin No.
Pin Name
I/O
Description
1
OSC
IN
I
Oscillator input. A CMOS inverting gate input intended for connection to a crystal resonator for
operation as an oscillator. The input has a V
CC
/2 input threshold and can be driven from an
external CMOS or TTL logic gate. May also be from a reference oscillator.
3
OSC
OUT
V
P
V
CC
O
Oscillator output.
Power supply for charge pump. Must be
t
V
CC
.
Power supply voltage input. Input may range from 2.7V to 5.5V. Bypass capacitors should be
placed as close as possible to this pin and be connected directly to the ground plane.
4
5
6
D
o
O
Internal charge pump output. For connection to a loop filter for driving the input of an external
VCO.
7
GND
Ground.
8
LD
O
Lock detect. Output provided to indicate when the VCO frequency is in ‘‘lock’’. When the loop is
locked, the pin’s output is HIGH with narrow low pulses.
10
f
IN
CLOCK
I
RF buffer input. Small signal input from the VCO.
11
I
High impedance CMOS Clock input. Data is clocked in on the rising edge, into the various
counters and registers.
13
DATA
I
Binary serial data input. Data entered MSB first. LSB is control bit. High impedance CMOS input.
14
LE
I
Load enable input (with internal pull-up resistor). When LE transitions HIGH, data stored in the
shift registers is loaded into the appropriate latch (control bit dependent). Clock must be low
when LE toggles high or low. See Serial Data Input Timing Diagram.
15
FC
I
Phase control select (with internal pull-up resistor). When FC is LOW, the polarity of the phase
comparator and charge pump combination is reversed.
16
BISW
O
Analog switch output. When LE is HIGH, the analog switch is ON, routing the internal charge
pump output through BISW (as well as through D
o
).
Monitor pin of phase comparator input. CMOS output.
17
f
OUT
w
p
O
18
O
Output for external charge pump.
w
p
is an open drain N-channel transistor and requires a pull-up
resistor.
19
PWDN
I
Power Down (with internal pull-up resistor).
PWDN
e
HIGH for normal operation.
PWDN
e
LOW for power saving.
Power down function is gated by the return of the charge pump to a TRI-STATE condition.
20
w
r
NC
O
Output for external charge pump.
w
r
is a CMOS logic output.
No connect.
2,9,12
http://www.national.com
2
相關PDF資料
PDF描述
LMX2301TM PLLatinumTM 160 MHz Frequency Synthesizer for RF Personal Communications
LMX2301TMX PLLatinumTM 160 MHz Frequency Synthesizer for RF Personal Communications
LMX2305TM PLLatinumTM 550 MHz Frequency Synthesizer for RF Personal Communications
LMX2305TMX PLLatinumTM 550 MHz Frequency Synthesizer for RF Personal Communications
LMX2305 PLLatinum 550 MHz Frequency Synthesizer for RF Personal Communications(PLLatinum技術用于射頻個人通訊的550MHZ頻率合成器)
相關代理商/技術參數
參數描述
LMX2301TM 制造商:Texas Instruments 功能描述:
LMX2301TMX 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinumTM 160 MHz Frequency Synthesizer for RF Personal Communications
LMX2305 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinumTM 550 MHz Frequency Synthesizer for RF Personal Communications
LMX2305 WAF 制造商:Texas Instruments 功能描述:
LMX2305C WAF 制造商:Texas Instruments 功能描述:
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