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參數(shù)資料
| 型號(hào)： | LMX2434SLEX |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | PLLatinum Dual High Frequency Synthesizer for RF Personal Communications |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 5000 MHz, PQCC20 |
| 封裝： | PLASTIC, UTCSP-20 |
| 文件頁數(shù)： | 40/49頁 |
| 文件大小： | 943K |
| 代理商： | LMX2434SLEX |
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2.0 Programming Description
(Continued)
2.4.3 RF_CPG - RF Synthesizer Charge Pump Current Gain (R0[19])
The RF_CPG bit controls the RF synthesizer’s charge pump gain. Two gain levels are available.
Control Bit
Register Location
Description
Function
0
1
RF_CPG
R0[19]
RF Charge Pump
Current Gain
LOW
1 mA
HIGH
4 mA
2.4.4 RF_CPT - RF Synthesizer Charge Pump TRI-STATE (R0[20])
The RF_CPT bit allows the charge pump to be switched between a normal operating mode and a high impedance output state.
This happens asynchronously with the change in the RF_CPT bit.
Furthermore, the RF_CPT bit operates in conjuction with the RF_PD bit to set a synchronous or an asynchronous powerdown
mode. Refer to
Section 2.5.4
for more details on how to program the RF_PD bit.
Control Bit
Register Location
Description
Function
0
1
RF_CPT
R0[20]
RF Charge Pump
TRI-STATE
RF Charge Pump
Normal Operation
RF Charge Pump
Output in High
Impedance State
2.4.5 RF_RST - RF Synthesizer Counter Reset (R0[21])
The RF_RST bit resets the RF_A, RF_B and RF_R counters. After removing the reset, the RF_A and RF_B counters resume
counting in close alignment with the RF_R counter. The maximum error is one prescaler cycle.
Control Bit
Register Location
Description
Function
0
1
RF_RST
R0[21]
RF Counter Reset
RF_A, RF_B and
RF_R
Normal Operation
RF_A, RF_B and
RF_R
Reset
2.5 R1 REGISTER
The R1 register contains the RF_A, RF_B, RF_P, and RF_PD control words. The RF_Aand RF_B control words are used to setup
the programmable feedback divider. The detailed descriptions and programming information for each control word is discussed
in the following sections.
Reg
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DATA[20:0] FIELD
ADDRESS
[2:0]
FIELD
R1
RF_
PD
RF_
P
LMX2430/33
RF_B[14:0]
LMX2430/33
RF_A[3:0]
0
0
1
R1
RF_
PD
RF_
P
LMX2434
RF_B[13:0]
LMX2434
RF_A[4:0]
0
0
1
2.5.1 LMX243x RF Synthesizer Swallow Counter
2.5.1.1 RF_A[3:0] - LMX2430/33 RF Synthesizer Swallow Counter (A Counter) (R1[6:3])
The RF_A control word is used to setup the RF synthesizer’s A counter. For both the LMX2430 and LMX2433, the A counter is
a 4-bit swallow counter used in the programmable feedback divider. The RF_Acontrol word can be programmed to values ranging
from 0 to 15.
Divide Ratio
LMX2430/33
RF_A[3:0]
3
0
0
1
2
0
0
1
1
0
0
1
0
0
1
1
0
1
15
L
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMX2434SLEX/NOPB | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| LMX2434TM | 制造商:Texas Instruments 功能描述:PLL Frequency Synthesizer Dual 500MHz to 5000MHz 20-Pin TSSOP Rail |
| LMX2434TM/NOPB | 功能描述:鎖相環(huán) - PLL 5.0Ghz High Freq Dual Pll RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| LMX2434TMX | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| LMX2434TMX/NOPB | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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