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參數(shù)資料
| 型號(hào)： | LMX2434TMX |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類(lèi)： | XO, clock |
| 英文描述： | PLLatinum Dual High Frequency Synthesizer for RF Personal Communications |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 5000 MHz, PDSO20 |
| 封裝： | PLASTIC, TSSOP-20 |
| 文件頁(yè)數(shù)： | 44/49頁(yè) |
| 文件大?。?/td> | 943K |
| 代理商： | LMX2434TMX |
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2.0 Programming Description
(Continued)
2.7.3 IF_CPG - IF Synthesizer Charge Pump Current Gain (R3[19])
The IF_CPG bit controls the IF synthesizer’s charge pump gain. Two gain levels are available.
Control Bit
Register Location
Description
Function
0
1
IF_CPG
R3[19]
IF Charge Pump
Current Gain
LOW
1 mA
HIGH
4 mA
2.7.4 IF_CPT - IF Synthesizer Charge Pump TRI-STATE (R3[20])
The IF_CPT bit allows the charge pump to be switched between a normal operating mode and a high impedance output state.
This happens asynchronously with the change in the IF_CPT bit.
Furthermore, the IF_CPT bit operates in conjuction with the IF_PD bit to set a synchronous or an asynchronous powerdown
mode. Refer to
Section 2.8.4
for more details on how to program the IF_PD bit.
Control Bit
Register Location
Description
Function
0
1
IF_CPT
R3[20]
IF Charge Pump
TRI-STATE
IF Charge Pump
Normal Operation
IF Charge Pump
Output in High
Impedance State
2.7.5 IF_RST - IF Synthesizer Counter Reset (R3[21])
The IF_RST bit resets of the IF_A, IF_B and IF_R counters. After removing the reset, the IF_A and IF_B counters resume
counting in close alignment with the IF_R counter. The maximum error is one prescaler cycle.
Control Bit
Register Location
Description
Function
0
1
IF_RST
R3[21]
IF Counter Reset
IF_A, IF_B and IF_R
Normal Operation
IF_A, IF_B and IF_R
Reset
2.8 R4 REGISTER
The R4 register contains the IF_A, IF_B, IF_P, and IF_PD control words. The IF_A and IF_B control words are used to setup the
programmable feedback divider. The detailed descriptions and programming information for each control word is discussed in the
following sections. R4[21] is always set to 0.
Reg
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DATA[20:0] FIELD
ADDRESS
[2:0]
FIELD
R4
IF_
PD
IF_
P
0
IF_B[13:0]
IF_A[3:0]
1
0
0
2.8.1 IF_A[3:0] - IF Synthesizer Swallow Counter (A Counter) (R4[6:3])
The IF_A control word is used to setup the IF synthesizer’s A counter. The A counter is a 4-bit swallow counter used in the
programmable feedback divider. The IF_A control word can be programmed to values ranging from 0 to 15.
Divide Ratio
IF_A[3:0]
3
0
0
1
2
0
0
1
1
0
0
1
0
0
1
1
0
1
15
L
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMX2434TMX/NOPB | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| LMX2470 | 制造商:NSC 制造商全稱(chēng):National Semiconductor 功能描述:2.6 GHz Delta-Sigma Fractional-N PLL with 800 MHz Integer-N PLL |
| LMX2470EVAL | 功能描述:時(shí)鐘和定時(shí)器開(kāi)發(fā)工具 LMX2470 EVAL BOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類(lèi)型:Clock Conditioners 工具用于評(píng)估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| LMX2470SLEX | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| LMX2470SLEX/NOPB | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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