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參數(shù)資料
| 型號： | LP61L1008AS-8 |
| 廠商： | AMIC Technology Corporation |
| 元件分類： | SRAM |
| 英文描述： | 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM |
| 中文描述： | 128K的× 8位高速3.3V的中心功耗CMOS SRAM |
| 文件頁數(shù)： | 1/11頁 |
| 文件大小： | 118K |
| 代理商： | LP61L1008AS-8 |
LP61L1008A
Preliminary
128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM
PRELIMINARY
(August, 2001, Version 1.0)
1
AMIC Technology, Inc.
Features
n Single 3.3V ± 10% power supply
n Access times: 8/10/12 ns (max.)
n Current: Operating: 160/155/150mA (max.)
Standby:
5mA (max.)
n Full static operation, no clock or refreshing required
n All inputs and outputs are directly TTL compatible
n Center Power/Ground Pin Configuration
n Common I/O using three-state output
n Output enable and one chip enable inputs for easy
application
n Data retention voltage: 2.0V (min.)
n Available in 32-pin SOJ 300 mil package
General Description
The LP61L1008A is a high speed 1,048,576-bit static
random access memory organized as 131,072 words by
8 bits and operates on a single 3.3V power supply.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.
The chip enable input is provided for POWER-DOWN
and device enable and an output enable input is included
for easy interfacing.
Data retention is guaranteed at a power supply voltage
as low as 2.0V.
Pin Configuration
A0
A1
A2
A3
CE
I/O1
I/O2
VCC
GND
I/O3
I/O4
WE
A4
A5
A6
A8
A7
A9
A10
A11
A12
I/O5
I/O6
VCC
I/O7
I/O8
OE
A13
A14
A15
A16
GND
LP61L1008AS
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| LP61L1008S-12 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM |
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