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參數資料
型號: LT3694IFE-1#TRPBF
廠商: Linear Technology
文件頁數: 11/28頁
文件大小: 338K
描述: IC REG TRPL BUCK/LINEAR 20TSSOP
標準包裝: 2,500
拓撲: 降壓(降壓)(1),線性(LDO)(2)
功能: 任何功能
輸出數: 3
頻率 - 開關: 250kHz ~ 2.5MHz
電壓/電流 - 輸出 1: 0.75 V ~ 16 V,2.6A
電壓/電流 - 輸出 2: 控制器
電壓/電流 - 輸出 3: 控制器
帶 LED 驅動器:
帶監控器:
帶序列發生器:
電源電壓: 4 V ~ 36 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)裸露焊盤
供應商設備封裝: 20-TSSOP-EP
包裝: 帶卷 (TR)
LT3694/LT3694-1
11
36941fb
APPLICATIONS INFORMATION
t
OFF(MIN)
 = 140ns. f
MAX1
 is the frequency at which the mini-
mum duty cycle is exceeded. The regulator will skip ON pulses
in order to reduce the overall duty cycle at frequencies above
f
MAX1
. It will continue to regulate but with increased
inductor current and greatly increased output ripple. The
increased peak inductor current in pulse-skipping will
also stress the switch transistor at high voltages and high
switching frequency. f
MAX2
 is the frequency at which the
maximum duty cycle is exceeded. If there is sufficient
charge on the BST capacitor, the regulator will skip OFF
periods to increase the overall duty cycle at frequencies
above f
MAX2
. It will continue to regulate but will not have
constant-frequency operation.
Note that the restriction on the operating input voltage
refers to steady-state limits to keep the output in regulation
in constant-frequency mode; the circuit will tolerate input
voltage transients up to the absolute maximum rating.
Switching Frequency
Once the upper limit for the switching frequency is found
from the duty cycle requirements, the frequency may be
chosen below the upper limit. Lower frequencies result in
lower switching losses, but require larger inductors and
capacitors. The user must decide the best trade-off. The
switching frequency is set by a resistor connected from
the RT pin to ground, or by forcing a clock signal into the
SYNC pin (LT3694 only). The LT3694 applies a voltage of
0.75V across this resistor and uses the current to set the
oscillator speed. The switching frequency is given by the
following formula:
 
f
SW
=
49.8
R
T
+8.8
where f
SW
 is in MHz and R
T
 is in k? The formula is
accurate within ?% over the frequency range. Table 1
shows the typical measured value of R
T
 for several com-
mon switching frequencies.
Table 1: R
T
 for Common Frequencies
SWITCHING FREQUENCY (MHz)
R
T
 (k)
0.25
193
0.5
90.2
0.75
56.6
1
40.2
1.25
30.5
1.5
23.8
1.75
19.6
2
16.0
2.25
13.5
2.5
11.4
For external clocks applied to the SYNC pin (LT3694 only),
the circuit will support V
H
 logic levels from 1.8V to 5V
CMOS or TTL. The duty cycle needs a minimum on time of
100ns and a minimum off time of 100ns. When operating
in sync mode, R
T
 should be set to provide a frequency at
least 20% below the minimum sync frequency.
Inductor Selection and Maximum Output Current
A good first choice for the inductor value is:
 
L=
V
OUT
+V
F
1.25A f
where f is the switching frequency in MHz, L is the inductor
value in 礖, V
OUT
 is the output voltage and V
F
 is the catch
diode voltage drop.
The current in the inductor is a triangle wave with an
average value equal to the load current. The peak switch
current is equal to the output current plus half the peak-to-
peak inductor ripple current. The LT3694 limits its switch
current in order to protect itself and the system from
overload faults. Therefore, the maximum output current
that the LT3694 will deliver depends on the switch current
limit, the inductor value and the input and output voltages.
When the switch is off, the potential across the inductor
is the output voltage plus the catch diode drop. This gives
the peak-to-peak ripple current in the inductor:
 
I
L
=(1DC)
V
OUT
+V
F
L f
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