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參數(shù)資料
| 型號(hào)： | LT4220IGN#TR |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 11/16頁(yè) |
| 文件大小： | 259K |
| 描述： | IC CTLR HOTSWAP DUAL 16-SSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 熱交換控制器 |
| 應(yīng)用： | 通用 |
| 內(nèi)部開關(guān)： | 無 |
| 電源電壓： | 2.7 V ~ 16.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SSOP |
| 包裝： | 帶卷 (TR) |
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11
LT4220
4220f
Initial Power-Up Sequence
After the power pins first make contact, transistors Q1 and
Q2 remain off. If the voltage at the ON
+
and ON
pins
exceed the turn-on threshold voltage, the internal voltage
on the V
CC
and V
EE
power pins exceed the undervoltage
lockout threshold, and the timer pin voltage is less than
1.24V, the gate drive to transistors Q1 and Q2 will be
turned on. The voltage on the GATE
+
and GATE
pins will
be regulated to control the inrush current if the voltage
across R
S
+
or R
S
exceeds the sense amplifier current
limit threshold. If supply tracking is enabled, each gate will
also be regulated to keep the magnitudes at the FB
+
and
FB
pins within 50mV of each other.
V
CC
ON
+
C6
1礔
C5
1礔
R2
R1
R4
R3
V
EE
V
CC
FAULT
TIMER
GND
ON
PWRGD
FB
+
R10
R9
V
OUT
+
R12
R11
4220 F07
V
OUT
R7
10&
FB
SENSE
+
R
S
+
R
S
GATE
+
R6
1k
R5
10&
C1
10nF
R8
1k
C2
10nF
C3
100nF
Q1
V
EE
SENSE
SENSEK
LT4220
GATE
Q2
CL2
CL1
Z2*
R14
10&
C4
100nF
Z1*
R13
10&
CONNECT FOR
AUTO RESTART
BACKPLANE
CONNECTOR
STAGGERED
PCB EDGE
CONNECTOR
V
IN
+
V
IN
GND MUST CONNECT FIRST
GND
*TRANSIENT VOLTAGE SUPPRESSOR
ESD
CONTROL
TRACK
7
10
13
5
4
3
2
1
6
9
8
11
12
16
15
14
R16, 20k
C7
C8
+
+
D1
IN4001
D2
IN4001
Figure 7. Hot Swap Controller on Daughter Board with Tracking Disabled
APPLICATIO S I FOR ATIO
U
U
U
live insertion. Resistive dividers R1, R2 and R3, R4 pro-
vide undervoltage sensing. Resistor dividers R9, R10 and
R11, R12 provide a power good signal and control output
voltage tracking when TRACK is enabled.
Internal Supply Diodes
The LT4220 contains two internal diodes which clamp V
EE
and V
CC
with respect to GND in the event either supply pin
is floating. V
EE
is clamped one diode above GND and V
CC
is clamped one diode below GND. The current through
these diodes are designed to handle 10mA internal device
current and should not be used for high load current
conditions.
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