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參數(shù)資料
| 型號： | LTC1662CMS8#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 1/16頁 |
| 文件大小： | 0K |
| 描述： | IC D/A CONV 10BIT MICRPWR 8-MSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 設(shè)置時間： | 400µs |
| 位數(shù)： | 10 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 260µW |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-MSOP |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電壓，單極 |
| 采樣率（每秒）： | * |
LTC1662
1
1662fa
Block Diagram
Features
Description
Ultralow Power, Dual
10-Bit DAC in MSOP
The LTC1662 is an ultralow power, fully buffered voltage
output,dual10-bitdigital-to-analogconverter(DAC).Each
DAC channel draws just 1.7A (typ) total supply-plus-
reference operating current, yet is capable of supplying
DC output currents in excess of 1mA and reliably driving
capacitive loads of up to 1000pF. A programmable sleep
mode further reduces total operating current to 0.05A.
Linear Technology’s proprietary, inherently monotonic
architecture provides excellent linearity and an exception-
ally small external form factor. The double-buffered input
logic provides simultaneous update capability and can be
used to write to the DACs without interrupting sleep mode.
With its tiny operating current and exceptionally small
size, the LTC1662 is ideal for use in the most power-
constrained products. For most designs, there is no
perceptible impact on the power budget; the LTC1662
draws many times less current than even a trimpot,
while providing buffered, low impedance (0.5Ω typical,
VCC = 5V) rail-to-rail outputs.
The LTC1662 is pin and software compatible with the
LTC1661 dual, 60A 10-bit DAC. It is available in 8-pin
MSOP and PDIP packages and is specified over the in-
dustrial temperature range.
Total Supply-Plus-Reference
Operating Current
applications
n
Ultralow Power: 1.5A (Typ) ICC per DAC Plus
0.05A Sleep Mode for Extended Battery Life
n
Tiny: Two 10-Bit DACs in an 8-Lead MSOP—
Half the Size of an SO-8
n
Wide 2.7V to 5.5V Supply Range
n
Double Buffered for Simultaneous DAC Updates
n
Rail-to-Rail Voltage Outputs Drive 1000pF
n
Reference Range Includes Supply for Ratiometric
0V to VCC Output
n
Reference Input Impedance Is Code-Independent
(7.1MΩ Typ)—Eliminates External Buffers
n
3-Wire Serial Interface with Schmitt Trigger Inputs
n
Differential Nonlinearity: ±0.75LSB Max
n
Mobile Communications
n
Portable Battery-Powered Instruments
n
Remote or Inaccessible Adjustments
n
Digitally Controlled Amplifiers and Attenuators
n
Factory or Field Calibration
L
, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
CS/LD
1662 BD
1
4
10-BIT
DAC A
10-BIT
DAC B
ADDRESS
DECODER
CONTROL
LOGIC
SHIFT REGISTER
SDI
REF
3
VOUT A
8
5
GND
7
VCC
VOUT B
6
LATCH
SCK
2
TEMPERATURE (°C)
–55 –35 –15 5
25 45 65 85 105 125
I CC
+
I REF
(A)
1662 TA01b
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
VREF = VCC
CODE = 1023
5.5V
VCC = 2.7V
4.5V
3.6V
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