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參數資料
型號: LU3X54FTL-HS208-DB
英文描述: QUAD-FET for 10Base-T/100Base-TX/FX
中文描述: 四核10Base-T/100Base-TX/FX場效應管
文件頁數: 1/54頁
文件大小: 677K
代理商: LU3X54FTL-HS208-DB
LU3X54FT
QUAD-FET (Fast Ethernet Transceiver) for 10Base-T/100Base-TX/
FX
Data Sheet
July 2000
Introduction
The LU3X54FT is a four-channel, single-chip com-
plete transceiver designed specifically for dual-speed
10Base-T, 100Base-TX, and 100Base-FX repeaters
and switches. It supports simultaneous operation in
three separate IEEE standard modes: 10Base-T,
100Base-TX, and 100Base-FX.
Each channel implements:
I
10Base-T transceiver function of IEEE802.3.
I
Physical coding sublayer (PCS) of IEEE802.3u.
I
Physical medium attachment (PMA) of IEEE
802.3u.
I
Autonegotiation of IEEE 802.3u.
I
MII management of IEEE802.3u.
I
Physical medium dependent (PMD) of IEEE802.3.
The LU3X54FT supports operations over two pairs of
unshielded twisted-pair (UTP) cable (10Base-T and
100Base-TX), and over fiber-optic cable (100Base-
FX).
It has been designed with a flexible system interface
that allows configuration for optimum performance
and effortless design. The individual per-port inter-
face can be configured as 100 Mbits/s MII, 10 Mbits/s
MII, 7-pin 10 Mbits/s serial, or bused mode.
Features
10 Mbits/s Transceiver
I
Compatible with IEEE* 802.3 10Base-T standard
for twisted-pair cable
I
Autopolarity detection and correction
I
Adjustable squelch level for extended line length
capability (two levels)
I
Interfaces with IEEE802.3u media independent
interface (MII) or a serial 10 Mbits/s 7-pin interface
I
On-chip filtering eliminates the need for external
filters
I
Half- and full-duplex operations
100 Mbits/s TX Transceiver
I
Compatible with IEEE 802.3u MII (clause 22), PCS
(clause 23), PMA (clause 24), autonegotiation
(clause 28), and PMD (clause 25) specifications
I
Scrambler/descrambler bypass
I
Encoder/decoder bypass
I
3-statable MII in 100 Mbits/s mode
I
Selectable carrier sense signal generation (CRS)
asserted during either transmission or reception in
half duplex (CRS asserted during reception only in
full duplex)
I
Selectable MII or 5-bit code group interface
I
Full- or half-duplex operations
I
Optional carrier integrity monitor (CIM)
I
On-chip filtering and adaptive equalization that
eliminates the need for external filters
* IEEEis a registered trademark of The Institute of Electrical and Electronics Engineers, Inc.
Note: Advisories are issued as needed to update product information. When using this data sheet for design purposes, please contact
your Lucent Technologies Microelectronics Group Account Manager to obtain the latest advisory on this product.
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