- 您現在的位置：買賣IC網 > PDF目錄369886 > LXT9762HC LAN TRANSCEIVER|HEX|QFP|208PIN|PLASTIC PDF資料下載
參數資料
| 型號： | LXT9762HC |
| 英文描述： | LAN TRANSCEIVER|HEX|QFP|208PIN|PLASTIC |
| 中文描述： | 網絡收發器|六角| QFP封裝| 208PIN |塑料 |
| 文件頁數： | 1/68頁 |
| 文件大小： | 1177K |
| 代理商： | LXT9762HC |
當前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁
LXT9784
Low-Power Octal PHY
Datasheet
The LXT9784 is an eight-port Fast Ethernet PHY Transceiver supporting IEEE 802.3 10Mbps
and 100Mbps physical layer applications. It provides both a Reduced Media Independent
Interface (RMII) and a Serial Media Independent Interface (SMII) for switching and other
independent port applications. In RMII mode, each PHY has a discrete exposed RMII interface,
and in SMII mode a discrete exposed SMII interface. All network ports provide a Twisted-Pair
(TP) interface for a 10/100BASE-TX connection.
The LXT9784 provides three discrete LED driver outputs for each port. The device supports
both half- and full-duplex 10Mbps and 100Mbps operation, and requires only a single 3.3V
power supply. For low power applications the devices may be powered by a single 3.0V power
supply. Advanced design techniques result in very low power requirements.
The LXT9784 also supports an auto-MDIX feature as well as an integrated Hardware Integrity
(HWI) feature that utilizes a Time Domain Reflectometry (TDR) technique to locate and report
problems with the cable plant.
Product Features
I
Eight IEEE 802.3 Standard-compliant
10BASE-T or 100BASE-TX ports with
integrated filters.
I
Automatic MDI/MDIX switch over
capability.
I
Integrated Hardware Integrity (HWI):
device ports detect and report cabling
problems via MDIO.
I
Uses 1:1 magnetic device for 10/100 Mbps
operation, allowing low-cost design.
I
Supports both IEEE 802.3u Auto-
Negotiation and parallel detection
operation.
I
Controls all 8 ports through one single
IEEE 802.3 Standard compliant MII
management bus.
I
Automatic polarity correction at 10M data
rate.
I
Robust baseline wander correction for
improved 100BASE-TX performance.
I
Eight Reduced MII (RMII) and Serial MII
(SMII) ports for independent PHY port
operation.
I
Low power consumption, 3.0V and 3.3V
operation.
I
324-lead PBGA package.
—LXT9784BC - Commercial (0
°
to 70
°
C
ambient).
—LXT9784BE - Extended (-40
°
to 85
°
C
ambient).
As of January 15, 2001, this document replaces the Level One document
LXT9784 Low-Power Octal PHY Datasheet
.
Order Number: 249272-001
January 2001
相關PDF資料 |
PDF描述 |
|---|---|
| LXT9781 | Interface IC |
| LXT9781BC | LAN TRANSCEIVER|OCTAL|BGA|272PIN|PLASTIC |
| LXT9781HC | LAN TRANSCEIVER|OCTAL|QFP|208PIN|PLASTIC |
| LXT9782 | Interface IC |
| LXT9782BC | LAN TRANSCEIVER|OCTAL|BGA|272PIN|PLASTIC |
相關代理商/技術參數 |
參數描述 |
|---|---|
| LXT9763 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Fast Ethernet 10/100 Hex Transceiver with Full MII |
| LXT9763HC | 制造商:LEVEL_ONE 功能描述: |
| LXT9763HC-B2 | 制造商:Intel 功能描述: |
| LXT9763HC-C4 | 制造商:Intel 功能描述: |
| LXT9781 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC |
發布緊急采購，3分鐘左右您將得到回復。