- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376119 > M12L16161A-5T (Electronic Theatre Controls, Inc.) 512K x 16Bit x 2Banks Synchronous DRAM PDF資料下載
參數(shù)資料
| 型號： | M12L16161A-5T |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 512K x 16Bit x 2Banks Synchronous DRAM |
| 中文描述： | 為512k × 16Bit的X 2Banks同步DRAM |
| 文件頁數(shù)： | 1/27頁 |
| 文件大小： | 566K |
| 代理商： | M12L16161A-5T |
當前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁
M12L16161A
Elite Semiconductor Memory Technology Inc.
P.
1
Publication Date : J an. 2000
Revision : 1.3u
512K x 16Bit x 2Banks Synchronous DRAM
FEATURES
z
JEDEC standard 3.3V power supply
z
LVTTL compatible with multiplexed address
z
Dual banks operation
z
MRS cycle with address key programs
-
CAS Latency (2 & 3 )
-
Burst Length (1, 2, 4, 8 & full page)
-
Burst Type (Sequential & Interleave)
z
All inputs are sampled at the positive going edge
of the system clock
z
Burst Read Single-bit Write operation
z
DQM for masking
z
Auto & self refresh
z
32ms refresh period (2K cycle)
GENERAL DESCRIPTION
The M12L16161A is 16,777,216 bits synchro-
nous high data rate Dynamic RAM organized as
2 x 524,288 words by 16 bits, fabricated with
high performance CMOS technology. Synchro-
nous design allows precise cycle control with the
use of system clock I/O transactions are possible
on every clock cycle. Range of operating fre-
quencies, programmable burst length and pro-
grammable latencies allow the same device to be
useful for a variety of high bandwidth, high
performance memory system applications.
ORDERING INFORMATION
Part NO.
MAX Freq.
233MHz
200MHz
183MHz
166MHz
143MHz
125MHz
Interface
Package
M12L16161A-4.3T
M12L16161A-5T
M12L16161A-5.5T
M12L16161A-6T
M12L16161A-7T
M12L16161A-8T
LVTTL
50
TSOP(II)
PIN CONFIGURATION (TOP VIEW)
V
DD
DQ0
DQ1
V
SSQ
DQ2
DQ3
V
DDQ
DQ4
DQ5
V
SSQ
DQ6
DQ7
V
DDQ
LDQM
WE
CAS
RAS
CS
BA
A10/AP
A0
A1
A2
A3
V
DD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
V
SS
DQ15
DQ14
V
SSQ
DQ13
DQ12
V
DDQ
DQ11
DQ10
V
SSQ
DQ9
DQ8
V
DDQ
N.C/RFU
UDQM
CLK
CKE
N.C
A9
A8
A7
A6
A5
A4
V
SS
50PIN TSOP(II)
(400mil x 825mil)
(0.8 mm PIN PITCH)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M12L16161A-6T | 512K x 16Bit x 2Banks Synchronous DRAM |
| M12L16161A-7T | 512K x 16Bit x 2Banks Synchronous DRAM |
| M12L16161A-8T | 512K x 16Bit x 2Banks Synchronous DRAM |
| M12L64322A | 512K x 32 Bit x 4 Banks Synchronous DRAM |
| M12L64322A-6T | PT 5C 5#16 SKT RECP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M12L16161A-5TG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:512K x 16Bit x 2Banks Synchronous DRAM |
| M12L16161A-5TG2Q | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:512K x 16Bit x 2Banks |
| M12L16161A-5TIG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:512K x 16Bit x 2Banks Synchronous DRAM |
| M12L16161A-6T | 制造商:ESI 功能描述: |
| M12L16161A-7BG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:512K x 16Bit x 2Banks Synchronous DRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。