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參數(shù)資料
| 型號： | M366S3953MTS-C1H |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Shrink Tubing; Tubing Size Diameter:2"; Shrink Temperature:100 C; Wall Thickness Recovered Nominal:0.045"; Inner Diameter Max Recovered:1.000"; Expanded Inner Diameter:2.000"; Material:Polyolefin; Approval Bodies:UL, CSA |
| 中文描述： | PC133/PC100無緩沖DIMM |
| 文件頁數(shù)： | 1/9頁 |
| 文件大小： | 135K |
| 代理商： | M366S3953MTS-C1H |
PC133/PC100 Unbuffered DIMM
M366S2953MTS
REV. 0.0 Dec. 2001
The Samsung M366S2953MTS is a 64M bit x 64 Synchronous
Dynamic RAM high density memory module. The Samsung
M366S2953MTS consists of sixteen CMOS 64M x 8 bit with
4banks Synchronous DRAMs in TSOP-II 400mil package and a
2K EEPROM in 8-pin TSSOP package on a 168-pin glass-epoxy
substrate. Two 0.1uF decoupling capacitors are mounted on the
printed circuit board in parallel for each SDRAM.
The M366S2953MTS is a Dual In-line Memory Module and is
intended for mounting into 168-pin edge connector sockets.
Synchronous design allows precise cycle control with the use of
system clock. I/O transactions are possible on every clock cycle.
Range of operating frequencies, programmable latencies allows
the same device to be useful for a variety of high bandwidth, high
performance memory system applications.
Performance range
Burst mode operation
Auto & self refresh capability (8192 Cycles/64ms)
LVTTL compatible inputs and outputs
Single 3.3V
±
0.3V power supply
MRS cycle with address key programs
Latency (Access from column address)
Burst length (1, 2, 4, 8 & Full page)
Data scramble (Sequential & Interleave)
All inputs are sampled at the positive going edge of the
system clock
Serial presence detect with EEPROM
PCB :
Height (1,375mil)
, double sided component
Part No.
Max Freq. (Speed)
133MHz@CL=3
100MHz @ CL=2
100MHz @ CL=3
M366S2953MTS-C75
M366S3953MTS-C1H
M366S2953MTS-C1L
FEATURE
GENERAL DESCRIPTION
M366S2953MTS SDRAM DIMM
128Mx64 SDRAM DIMM based on 64Mx8, 4Banks, 8K Refresh, 3.3V Synchronous DRAMs with SPD
PIN NAMES
* These pins are not used in this module.
**
These pins should be NC in the system
which does not support SPD.
Pin Name
A0 ~ A12
BA0 ~ BA1
DQ0 ~ DQ63
CLK0 ~ CLK3
CKE0 ~ CKE1
CS0 ~ CS3
RAS
CAS
WE
DQM0 ~ 7
V
DD
V
SS
*V
REF
SDA
SCL
SA0 ~ 2
*WP
DU
NC
Function
Address input (Multiplexed)
Select bank
Data input/output
Clock input
Clock enable input
Chip select input
Row address strobe
Column address strobe
Write enable
DQM
Power supply (3.3V)
Ground
Power supply for reference
Serial data I/O
Serial clock
Address in EEPROM
Write protection
Don
′
t use
No connection
PIN CONFIGURATIONS (Front side/back side)
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Front
V
SS
DQ0
DQ1
DQ2
DQ3
V
DD
DQ4
DQ5
DQ6
DQ7
DQ8
V
SS
DQ9
DQ10
DQ11
DQ12
DQ13
V
DD
DQ14
DQ15
*CB0
*CB1
V
SS
NC
NC
V
DD
WE
DQM0
Pin
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
Front
DQM1
CS0
DU
V
SS
A0
A2
A4
A6
A8
A10/AP
BA1
V
DD
V
DD
CLK0
V
SS
DU
CS2
DQM2
DQM3
DU
V
DD
NC
NC
*CB2
*CB3
V
SS
DQ16
DQ17
Pin
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
Front
DQ18
DQ19
V
DD
DQ20
NC
*V
REF
CKE1
V
SS
DQ21
DQ22
DQ23
V
SS
DQ24
DQ25
DQ26
DQ27
V
DD
DQ28
DQ29
DQ30
DQ31
V
SS
CLK2
NC
*WP
**SDA
**SCL
V
DD
Pin
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
Back
V
SS
DQ32
DQ33
DQ34
DQ35
V
DD
DQ36
DQ37
DQ38
DQ39
DQ40
V
SS
DQ41
DQ42
DQ43
DQ44
DQ45
V
DD
DQ46
DQ47
*CB4
*CB5
V
SS
NC
NC
V
DD
CAS
DQM4
Pin
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
Back
DQM5
CS1
RAS
V
SS
A1
A3
A5
A7
A9
BA0
A11
V
DD
CLK1
A12
V
SS
CKE0
CS3
DQM6
DQM7
*A13
V
DD
NC
NC
*CB6
*CB7
V
SS
DQ48
DQ49
Pin
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
Back
DQ50
DQ51
V
DD
DQ52
NC
*V
REF
NC
V
SS
DQ53
DQ54
DQ55
V
SS
DQ56
DQ57
DQ58
DQ59
V
DD
DQ60
DQ61
DQ62
DQ63
V
SS
CLK3
NC
**SA0
**SA1
**SA2
V
DD
SAMSUNG ELECTRONICS CO., Ltd. reserves the right to change products and specifications without notice.
Preliminary
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| M366S6453AT0-C1H00 | 制造商:Samsung SDI 功能描述:64M X 64 SDRAM DIMM based on 32M X 8, 4banks, 8K refresh, 3.3V synchronous drams with spd |
| M366S6453CTS | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:PC133/PC100 Unbuffered DIMM |
| M366S6453CTS-L1H/C1H | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:PC133/PC100 Unbuffered DIMM |
| M366S6453CTS-L1L/C1L | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:PC133/PC100 Unbuffered DIMM |
| M366S6453CTS-L7A/C7A | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:PC133/PC100 Unbuffered DIMM |
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