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參數資料
| 型號： | M5M467805DTP-6S |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | EDO MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM |
| 中文描述： | 江戶模式67108864位（16777216 - Word的4位）動態隨機存儲器 |
| 文件頁數： | 1/39頁 |
| 文件大小： | 403K |
| 代理商： | M5M467805DTP-6S |
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MITSUBISHI
ELECTRIC
Jun. 1999
EDO MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM
EDO MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM
EDO MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
MITSUBISHI LSIs
(Rev. 1.1)
M5M467405/465405BJ,BTP -5,-6,-5S,-6S
M5M467805/465805BJ,BTP -5,-6,-5S,-6S
M5M465165BJ,BTP -5,-6,-5S,-6S
Standard 32 pin SOJ, 32 pin TSOP
Standard 50 pin SOJ, 50 pin TSOP
Single 3.3 0.3V supply
Low stand-by power dissipation
1.8mW (Max) LVCMOS input level
Low operating power dissipation
M5M467405Bxx-5,5S / M5M467805Bxx-5,5S 360.0mW (Max)
M5M467405Bxx-6,6S / M5M467805Bxx-6,6S 324.0mW (Max)
M5M465405Bxx-5,5S / M5M465805Bxx-5,5S 468.0mW (Max)
M5M465405Bxx-6,6S / M5M465805Bxx-6,6S 432.0mW (Max)
M5M465165Bxx-5,5S 504.0mW (Max)
M5M465165Bxx-6,6S 468.0mW (Max)
Self refresh capability*
Self refresh current 400μA (Max)
EDO mode , Read-modify-write, CAS before RAS refresh, Hidden refresh capabilities
Early-write mode , OE and W to control output buffer impedance
All inputs, outputs LVTTL compatible and low capacitance
:Applicable to self refresh version(M5M467405/465405/467805/465805/465165BJ,BTP-5S,-6S:option) only
APPLICATION
Main memory unit for computers, Microcomputer memory, Refresh memory for CRT
DESCRIPTION
The M5M467405/465405BJ,BTP is organized 16777216-word by 4-bit, M5M467805/465805BJ,BTP is organized 8388608-word by
8-bit, and M5M465165BJ,BTP is organized 4194304-word by 16-bit dynamic RAMs, fabricated with the high performance CMOS
process, and are suitable for large-capacity memory systems with high speed and low power dissipation.
The use of double-layer aluminum process combined with CMOS technology and a single-transistor dynamic storage stacked
capacitor cell provide high circuit density. Multiplexed address inputs permit both a reduction in pins and an increase in system
densities.
ADDRESS
M5M465405Bxx
M5M467405Bxx
Part No.
XX=J,TP
FEATURES
Type name
M5M467405BXX-5,5S
M5M467805BXX-5,5S
M5M467405BXX-6,6S
M5M467805BXX-6,6S
M5M465405BXX-5,5S
M5M465805BXX-5,5S
M5M465405BXX-6,6S
M5M465805BXX-6,6S
RAS
(time
CAS
(time
(time
access
Address
time
(min.ns)
Cycle
dition
(typ.mW)
Power
50
60
50
13
15
13
25
30
25
84
104
84
300
250
390
13
15
13
aOE
(time
60
15
30
104
325
15
Type name
RAS
(max.ns)
aCAS
(max.ns)
(max.ns)
atime
time
(min.ns)
Cycle
atOE
(max.ns)
M5M465165BXX-6,6S
M5M465165BXX-5,5S
50
60
13
15
25
30
84
104
13
15
Power
tion
(typ.mW)
420
390
(M5M467405Bxx/M5M465405Bxx/M5M467805Bxx/M5M465805Bxx)
(M5M465165Bxx)
M5M465805Bxx
M5M467805Bxx
M5M465165Bxx
A0-A12
Row Add Col Add
Refresh
Refresh Cycle
Normal
RAS Only Ref,Normal R/W
CBR Ref,Hidden Ref
RAS Only Ref,Normal R/W
CBR Ref,Hidden Ref
A0-A10
A0-A11 A0-A11
8192/64ms
4096/64ms
4096/64ms
8192/128ms
4096/128ms
4096/128ms
S-version
A0-A12
RAS Only Ref,Normal R/W
CBR Ref,Hidden Ref
RAS Only Ref,Normal R/W
CBR Ref,Hidden Ref
RAS Only Ref,Normal R/W
CBR Ref,Hidden Ref
A0-A9
A0-A11 A0-A10
8192/64ms
4096/64ms
4096/64ms
8192/128ms
4096/128ms
4096/128ms
A0-A11 A0-A9
4096/64ms 4096/128ms
1
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PDF描述 |
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| M5M465165BTP-5 | EDO MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM |
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| M5M465165BTP-6 | EDO MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM |
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