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參數資料
| 型號： | M6255X |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | GENERAL PURPOSE C-MOS OP AMP(SINGLE/DUAL/QUAD) |
| 中文描述： | 一般用途的C - MOS運算放大器（單/雙/四） |
| 文件頁數： | 1/3頁 |
| 文件大小： | 24K |
| 代理商： | M6255X |
MITSUBISHI <STD LINEAR ICs>
M6255X Series
GENERAL PURPOSE CMOS OP AMP(SINGLE/DUAL/QUAD)
P
P
PR
R
RE
E
EL
L
LI
I
IM
M
MI
I
IN
N
NA
A
AR
R
RY
Y
Y
Some parametric limits are subject to change.
DESCRIPTION
The M6255X is a single power supply system semiconductor
integrated circuit designed to be used for general-purpose
arithmetic amplifier of general electronic equipment for consumer
appliances.
This IC adopts C-MOS structure to achieve low power
consumption and is therefore optimum for the recent boom in
portable electronic equipment. The IC is also available for various
applications for its full swing in both input and output, though the IC
has a single power supply.
FEATURES
Dissipation current………0.19/0.38/0.76mA<551/552/554> (TYP)
Output wide……………………V
O
=GND to V
CC
(V
IN
=GND to V
CC
)
Slew rate…………………………………………SR=1.2V/
μ
S (TYP)
Small size SSOP package. (551GP/ 552GP)
APPLICATION
Various types of arithmetic circuits for ink jet printer and other
general electronic equipment
RECOMMENDED OPERATING CONDITIONS
Supply voltage………………………………………………………5V
( 1 / 3 )
OUTLINE:
5P
T (M62551L)
SOT-25 (M62551GP)
8P
4
(M62552P)
8P
S (M62552FP)
SSOP-8 (M62552GP)
14P
4
(M62554P)
14P
2
S (M62554FP)
PIN CONFIGURATION (TOP VIEW)
1
2
V
C
3
4
I
5
I
M62551L
11
12
13
14
4
3
2
1
M
V
CC
OUTPUT 1
INVERTED
INPUT 4
NON-INVERTED
INPUT 4
INVERTED
INPUT 1
NON-INVERTED
INPUT 1
OUTPUT 4
10
5
GND
9
6
NON-INVERTED
INPUT 3
INVERTED
INPUT 3
8
7
NON-INVERTED
INPUT 2
INVERTED
INPUT 2
OUTPUT 2
OUTPUT 3
O
G
I
N
1
I
2
G
3
I
4
5
M62551GP
O
V
C
N
I
4
3
2
1
M
P
GND
OUTPUT 1
INVERTED
INPUT 2
NON-INVERTED
INPUT 2
INVERTED
INPUT 1
5
6
7
8
NON-INVERTED
INPUT 1
OUTPUT 2
V
CC
BLOCK DIAGRAM
(M62551L/GP)
1
OUTPUT
(5)
INVERTED
INPUT
(3)
4
3
5
2
NON-INVERtED
INPUT
(1)
V
CC
(4)
GND
(2)
*Pin number at GP is put in parentheses.
BLOCK DIAGRAM
(M62552P/FP/GP)
1
2
5
3
6
INVERTED
INPUT 1
NON-INVERTED
INPUT 1
OUTPUT 1
INVERTED
INPUT 2
NON-INVERTED
INPUT 2
OUTPUT 2
7
8
4
GND
V
CC
BLOCK DIAGRAM
(M62554P/FP)
3
1
2
CH1
CH4
CH2
CH3
INVERTED
INPUT 1
NON-INVERTED
INPUT 1
OUTPUT 1
7
OUTPUT 2
5
NON-INVERTED
INPUT 2
6
INVERTED
INPUT 2
13
INVERTED
INPUT 4
12
NON-INVERTED
INPUT 4
14
OUTPUT 4
8
OUTPUT 3
9
NON-INVERTED
INPUT 3
10
INVERTED
INPUT 3
11
4
V
CC
GND
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