欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號: M74HC620F1R
廠商: 意法半導體
英文描述: OCTAL BUS TRANSCEIVER HC620 3 STATE INVERTING HC623 3 STATE NON INVERTING
中文描述: 八路總線收發器HC620三態反相HC623三態非反相
文件頁數: 1/11頁
文件大小: 258K
代理商: M74HC620F1R
M54/74HC620
M54/74HC623
October 1992
HC620 3 STATE INVERTING HC623 3 STATE NON INVERTING
OCTAL BUS TRANSCEIVER
B1R
(Plastic Package)
ORDER CODES :
M54HCXXXF1R
M74HCXXXM1R
M74HCXXXB1R
M74HCXXXC1R
F1R
(Ceramic Package)
M1R
(Micro Package)
C1R
(Chip Carrier)
PIN CONNECTIONS (top view)
NC =
No Internal
Connection
DESCRIPTION
.
HIGH SPEED
tPD = 10 ns (TYP.) AT VCC =5 V
.
LOW POWER DISSIPATION
ICC =4
A (MAX.) AT TA =25 °C
.
HIGH NOISE IMMUNITY
VNIH =VNIL =28 % VCC (MIN.)
.
OUTPUT DRIVE CAPABILITY
15 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
|IOH|= IOL = 6 mA (MIN.)
.
BALANCED PROPAGATION DELAYS
tPLH =tPHL
.
WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V to 6 V
.
PIN AND FUNCTION COMPATIBLE
WITH LS620/623
The M54/74HC620/623 are high speed CMOS
OCTAL BUS TRANSCEIVERS fabricated in silicon
gate C
2MOS technology. They have the same high
speed performance of LSTTL combined with true
CMOS low power consumption.
These octal bus transceivers are designed for asyn-
chronous two-way communication between data
buses. The control function implementation allows
maximum flexibility in timing.
These devices allow data transmission from the A
bus to B bus or from the B to the A bus depending
upon the logic levels at the enable inputs (GBA and
GAB). The enable inputs can be used to disable the
device so that the buses are effectively isolated.
The dual-enable configuration gives these devices
the capability to store data by simultaneous enabling
of GBA and GAB.
Each output reinforces its input in this transceiver
configuration. Thus, when both control inputs are
enabled and all other data sources to the two sets
of bus lines are at high impedance, both sets of bus
lines (16 in all) will remain at their last states. The 8-
bit codes appearing on the two sets of buses will be
identical for the ’HC623 or complementary for the
’HC620. All inputs are equipped with protection cir-
cuits against static discharge and transient excess
voltage.
1/11
相關PDF資料
PDF描述
M28W320CT100GB1T 32 Mbit 2Mb x16, Boot Block Low Voltage Flash Memory
M28W320CT100GB6T 32 Mbit 2Mb x16, Boot Block Low Voltage Flash Memory
M28W320CT100N1T 32 Mbit 2Mb x16, Boot Block Low Voltage Flash Memory
M28W320CT100N6T 32 Mbit 2Mb x16, Boot Block Low Voltage Flash Memory
M27C512-25C3E 512 Kbit 64Kb x8 UV EPROM and OTP EPROM
相關代理商/技術參數
參數描述
M74HC623B1R 功能描述:總線收發器 DISC BY STM 3/01 DIP-20 OCTAL BUS TRN RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
M74HC640B1R 功能描述:總線收發器 DIP-20 OCTAL BUS TRN RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
M74HC646M1R 功能描述:總線收發器 Octal Bus Trans/Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
M74HC652M1R 制造商:STMicroelectronics 功能描述:Bus XCVR Single 8-CH 3-ST 24-Pin SOP Tube
M74HC670B1R 功能描述:寄存器 4WordX4Bit Reg File RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube
主站蜘蛛池模板: 永新县| 冀州市| 文水县| 清苑县| 镇原县| 岢岚县| 上杭县| 朝阳县| 龙江县| 泰来县| 古交市| 廊坊市| 延边| 兴山县| 秭归县| 哈尔滨市| 东乌珠穆沁旗| 贵州省| 松滋市| 宜良县| 秭归县| 荃湾区| 长丰县| 洛扎县| 满洲里市| 孙吴县| 巴彦县| 建始县| 凤阳县| 武夷山市| 金堂县| 赤水市| 通山县| 卢氏县| 大悟县| 南汇区| 平武县| 北票市| 纳雍县| 黄冈市| 眉山市|