
November 1991
Order Number: 271092-005
M80C287
80-BIT CHMOS III NUMERIC PROCESSOR EXTENSION
Military
Y
High Performance 80-Bit Internal
Architecture
Y
Implements ANSI/IEEE Standard 754-
1985 for Binary Floating-Point
Arithmetic
Y
Implements Extended M387 Numerics
Coprocessor Instruction Set
Y
Two to Three Times M8087/M80287
Performance at Equivalent Clock Speed
Y
Low Power Consumption
Y
Upward Object-Code Compatible from
M8087 and M80287
Y
Interfaces with M80286 and M80C286
CPUs
Y
Expands CPU’s Data Types to Include
32-, 64-, 80-Bit Floating Point, 32-, 64-
Bit Integers and 18-Digit BCD Operands
Y
Directly Extends CPU’s Instruction Set
to Trigonometric, Logarithmic,
Exponential, and Arithmetic
Instructions for All Data Types
Y
Full-Range Transcendental Operations
for SINE, COSINE, TANGENT.
ARCTANGENT and LOGARITHM
Y
Built-In Exception Handling
Y
Operates in Both Real and Protected
Mode Systems
Y
Eight 80-Bit Numeric Registers, Usable
as Individually Addressable General
Registers or as a Register Stack
Y
Available in 40-pin CERDIP
(See Packaging Outlines and Dimensions, order
Y
231369)
Y
Military Temperature Range:
b
55
§
C to
a
125
§
C (T
C
)
The Intel M80C287 is a high-performance numerics processor extension that extends the architecture of the
M80C286 CPU with floating point, extended integer, and BCD data types. A computing system that includes
the M80C287 fully conforms to the IEEE Floating Point Standard. Using a numerics oriented architecture, the
M80C287 adds over seventy mnemonics to the instruction set of the M80C286 CPU, making a complete
solution for high-performance numerics processing. The M80C287 is implemented with 1.5 micron, high-speed
CHMOS III technology and packaged in a 40-pin CERDIP. The M80C287 is upward object-code compatible
from the M80287 and M8087 numerics coprocessors. With proper socket design, either an M80287 or an
M80C287 can use the same socket.
271092–1
Figure 1. M80C287 Block Diagram