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參數(shù)資料
型號(hào): MACH111SP-18JI
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: PLD
英文描述: INDUSTRIAL TO RJ45 CAT5E PATCH CORD 20FT
中文描述: EE PLD, 18 ns, PQCC44
封裝: PLASTIC, LCC-44
文件頁(yè)數(shù): 1/48頁(yè)
文件大小: 1136K
代理商: MACH111SP-18JI
Publication# 14051
Rev: K
Amendment/0
Issue Date: November 1998
MACH 1 and 2 CPLD Families
High-Performance EE CMOS Programmable Logic
FEATURES
x
High-performance electrically-erasable CMOS PLD families
x
32 to 128 macrocells
x
44 to 100 pins in cost-effective PLCC, PQFP and TQFP packages
x
SpeedLocking – guaranteed xed timing up to 16 product terms
x
Commercial 5/5.5/6/7.5/10/12/15-ns tPD and Industrial 7.5/10/12/14/18-ns tPD
x
Congurable macrocells
— Programmable polarity
— Registered or combinatorial outputs
— Internal and I/O feedback paths
— D-type or T-type ip-ops
— Output Enables
— Choice of clocks for each ip-op
— Input registers for MACH 2 family
x
JTAG (IEEE 1149.1)-compatible, 5-V in-system programming available
x
Peripheral component interconnect (PCI) compliant at 5/5.5/6/7.5/10/12 ns
x
Safe for mixed supply voltage system designs
x
Bus-Friendly inputs and I/Os reduce risk of unwanted oscillatory outputs
x
Programmable power-down mode results in power savings of up to 75%
x
Supported by Vantis DesignDirect software for rapid logic development
— Supports HDL design methodologies with results optimized for Vantis
— Flexibility to adapt to user requirements
— Software partnerships that ensure customer success
x
Lattice/Vantis and third-party hardware programming support
— Lattice/VantisPRO (formerly known as MACHPRO) software for in-system programmability
support on PCs and Automated Test Equipment
— Programming support on all major programmers including Data I/O, BP Microsystems, Advin,
and System General
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