- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄355354 > MACH210A-12JI (ADVANCED MICRO DEVICES INC) High-Density EE CMOS Programmable Logic PDF資料下載
參數(shù)資料
| 型號(hào)： | MACH210A-12JI |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | PLD |
| 英文描述： | High-Density EE CMOS Programmable Logic |
| 中文描述： | EE PLD, 17 ns, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁(yè)數(shù)： | 1/47頁(yè) |
| 文件大小： | 347K |
| 代理商： | MACH210A-12JI |
當(dāng)前第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)
Publication# 14128
Rev. I
Amendment /0
Issue Date: May 1995
MACH210A-7/10/12
MACH210-12/15/20
MACH210AQ-12/15/20
High-Density EE CMOS Programmable Logic
FINAL
COM’L: -7/10/12/15/20, Q-12/15/20
IND: -12/14/18/24
DISTINCTIVE CHARACTERISTICS
44 Pins
64 Macrocells
7.5 ns tPD Commercial
12 ns tPD Industrial
133 MHz fCNT
38 Inputs; 210A Inputs have built-in pull-up
resistors
Peripheral Component Interconnect (PCI)
compliant
32 Outputs
64 Flip-flops; 2 clock choices
4 “PAL22V16” blocks with buried macrocells
Pin-compatible with MACH110, MACH111,
MACH211, and MACH215
GENERAL DESCRIPTION
The MACH210 is a member of the high-performance
EE CMOS MACH 2 device family. This device has
approximately six times the logic macrocell capability of
the popular PAL22V10 without loss of speed.
The MACH210 consists of four PAL blocks intercon-
nected by a programmable switch matrix. The four PAL
blocks are essentially “PAL22V16” structures complete
with product-term arrays and programmable macro-
cells, including additional buried macrocells. The switch
matrix connects the PAL blocks to each other and to all
input pins, providing a high degree of connectivity
between the fully-connected PAL blocks. This allows
designs to be placed and routed efficiently.
The MACH210 has two kinds of macrocell: output and
buried. The MACH210 output macrocell provides regis-
tered, latched, or combinatorial outputs with program-
mable polarity. If a registered configuration is chosen,
the register can be configured as D-type or T-type to
help reduce the number of product terms. The register
type decision can be made by the designer or by the
software. All output macrocells can be connected to an
I/O cell. If a buried macrocell is desired, the internal
feedback path from the macrocell can be used, which
frees up the I/O pin for use as an input.
The MACH210 has dedicated buried macrocells which,
in addition to the capabilities of the output macrocell,
also provide input registers or latches for use in
synchronizing signals and reducing setup time require-
ments.
Lattice Semiconductor
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MACH210A-14JI | High-Density EE CMOS Programmable Logic |
| MACH110-20 | ZTK-66,5 |
| MACH110-12 | High-Density EE CMOS Programmable Logic |
| MACH110-14 | RES 3.01K-OHM 1% 0.1W 100PPM THICK-FILM SMD-0603 5K/REEL-7IN-PA |
| MACH110-15 | RES 30.1K-OHM 1% 0.1W 100PPM THICK-FILM SMD-0603 5K/REEL-7IN-PA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MACH210A-12VC | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:High-Density EE CMOS Programmable Logic |
| MACH210A-14JI | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:High-Density EE CMOS Programmable Logic |
| MACH210A-18JI | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:High-Density EE CMOS Programmable Logic |
| MACH210A-24JI | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:High-Density EE CMOS Programmable Logic |
| MACH210A-7 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:High-Density EE CMOS Programmable Logic |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。