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參數資料
| 型號： | MACH4 |
| 廠商： | Lattice Semiconductor Corporation |
| 英文描述： | High Performance E 2 CMOS In-System Programmable Logic |
| 中文描述： | 高的E 2的CMOS在系統可編程邏輯 |
| 文件頁數： | 1/33頁 |
| 文件大小： | 294K |
| 代理商： | MACH4 |
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FINAL
Publication#
21535
Amendment/
+1
Rev:
A
Issue Date:
November 1997
1
M
MACH 4 FAMILY
1
COM’L: -15
IND: -18
MACH4-96/96-15
High-Performance EE CMOS Programmable Logic
DISTINCTIVE CHARACTERISTICS
N
144 Pins in PQFP
96 Macrocells
15 ns t
PD
47.6 MHz f
102 Inputs with pull-up resistors
96 I/Os; 4 dedicated inputs/clocks; 2 dedicated inputs
96 Flip-flops
Up to 20 product terms per macrocell, with XOR
Flexible clocking
— Four global clock pins with selectable edges
— Asynchronous mode available for each macrocell
3 MACH111SP-size blocks
SpeedLocking
for guaranteed fixed timing
JTAG, 5-V, in-system programmable
JTAG (IEEE 1149.1) boundary scan testing capability
Input and output switch matrices for high routability
N
N
Commercial, 18 ns t
PD
Industrial
N
CNT
N
N
N
N
N
N
N
N
N
N
PLEASE NOTE
This device is currently dual-marked with the MACH355 ordering part number. The dual-mark
scheme will facilitate design and manufacturing flows until we have completely phased in the new
M4-96/96 nomenclature. Please use the MACH355 data sheet (PID# 17467) as a reference.
: The MACH4-96/96 (M4-96/96) reflects a new nomenclature for the MACH
4 Family.
GENERAL DESCRIPTION
The MACH4-96/96 (M4-96/96) is a member of Vantis’ high-performance EE CMOS MACH 4 family.
This device has approximately three times the macrocell capability of the popular MACH111SP,
with significant additional density and functional features.
The M4-96/96 consists of six PAL
The central switch matrix connects the PAL blocks to each other and to all input pins, providing a
high degree of connectivity between the PAL blocks. This allows designs to be placed and routed
efficiently. Routability is further enhanced by an input switch matrix and an output switch matrix.
The input switch matrix provides input signals with alternative paths into the central switch matrix;
the output switch matrix provides flexibility in assigning macrocells to I/O pins.
blocks interconnected by a programmable central switch matrix.
Lattice Semiconductor
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相關代理商/技術參數 |
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| MACH4002 48+4G-L3P | 制造商:HIRSCHMANN INDUSTRIAL 功能描述:Ethernet Switch, Backbone, Enhanced, Layer 3, 16xRJ45(10/100), 4xSFP(1Gig) Ports |
| MACH4002-48G-L2P | 制造商:HIRSCHMANN INDUSTRIAL 功能描述:Ethernet Switch, Layer 2, Professional Management, 48 x Gig Ports, 943911101 |
| MACH4002-48G-L3P | 制造商:HIRSCHMANN INDUSTRIAL 功能描述:Ethernet Switch, Layer 3 Gigabit Backbone, Professional Management, 943911301 |
| MACH435-12 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:High-Density EE CMOS Programmable Logic |
| MACH435-12JC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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