
General Description
The MAX5893 programmable interpolating, modulating,
500Msps, dual digital-to-analog converter (DAC) offers
superior dynamic performance and is optimized for high-
performance wideband, single-carrier transmit applica-
tions. The device integrates a selectable 2x/4x/8x
interpolating filter, a digital quadrature modulator, and
dual 12-bit high-speed DACs on a single integrated cir-
cuit. At 30MHz output frequency and 500Msps update
rate, the in-band SFDR is 84dBc while consuming 1.1W.
The device also delivers 72dB ACLR for single-carrier
WCDMA at a 61.44MHz output frequency.
The selectable interpolating filters allow lower input data
rates while taking advantage of the high DAC update
rates. These linear-phase interpolation filters ease
reconstruction filter requirements and enhance the
passband dynamic performance. Individual offset and
gain programmability allow the user to calibrate out local
oscillator (LO) feedthrough and sideband suppression
errors generated by analog quadrature modulators.
The MAX5893 features a f
IM
/ 4 digital image-reject
modulator. This modulator generates a quadrature-mod-
ulated IF signal that can be presented to an analog I/Q
modulator to complete the upconversion process. A
second digital modulation mode allows the signal to be
frequency-translated with image pairs at f
IM
/ 2 or f
IM
/ 4.
The MAX5893 features a standard 1.8V CMOS, 3.3V tol-
erant data input bus for easy interface. A 3.3V SPI port
is provided for mode configuration. The programmable
modes include the selection of 2x/4x/8x interpolating fil-
ters, f
IM
/ 2, f
IM
/ 4 or no digital quadrature modulation
with image rejection, channel gain and offset adjustment,
and offset binary or two’s complement data interface.
Pin-compatible 14- and 16-bit devices are also available.
Refer to the MAX5894** data sheet for the 14-bit version
and the MAX5895 data sheet for the 16-bit version.
Applications
Base Stations: 3G UMTS, CDMA, and GSM
Broadband Wireless Transmitters
Broadband Cable Infrastructure
Instrumentation and Automatic Test Equipment (ATE)
Analog Quadrature Modulation Architectures
Features
72dB ACLR at f
OUT
= 61.44MHz (Single-Carrier
WCDMA)
Meets 3G UMTS, cdma2000
, GSM Spectral Masks
(f
OUT
= 122MHz)
Noise Spectral Density = -151dBFS/Hz at
f
OUT
= 16MHz
90dBc SFDR at Low-IF Frequency (10MHz)
86dBc SFDR at High-IF Frequency (50MHz)
Low Power: 511mW (f
CLK
= 100MHz)
User Programmable
Selectable 2x, 4x, or 8x Interpolating Filters
<0.01dB Passband Ripple
>99dB Stopband Rejection
Selectable Real or Complex Modulator Operation
Selectable Modulator LO Frequency: OFF, f
IM
/ 2,
or f
IM
/ 4
Selectable Output Filter: Lowpass or Highpass
Channel Gain and Offset Adjustment
EV Kit Available (Order the MAX5895EVKIT)
M
12-Bit, 500Msps Interpolating and Modulating
Dual DAC with CMOS Inputs
________________________________________________________________
Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
PART
RESOLUTION
(BITS)
DAC UPDATE
RATE (Msps)
INPUT
LOGIC
MAX5893
MAX5894**
MAX5895
**
Future product—contact factory for availability.
12
14
16
500
500
500
CMOS
CMOS
CMOS
PART
TEMP RANGE
PIN-PACKAGE
PKG
CODE
MAX5893EGK
-40°C to +85°C
68 QFN-EP*
(10mm x 10mm)
G6800-4
Selector Guide
Ordering Information
D
A
DAC
DATA
PORT A
DATA
PORT B
DATACLK
OUTI
OUTQ
M
2
I
F
1
I
F
DAC
Simplified Diagram
19-3546; Rev 0; 2/05
Pin Configuration appears at end of data sheet.
SPI is a trademark of Motorola, Inc.
cdma2000 is a registered trademark of Telecommunications
Industry Association.
*
EP = Exposed paddle.
EVALUATION KIT
AVAILABLE