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參數資料
| 型號： | MAX5911ESA |
| 廠商： | Maxim Integrated |
| 文件頁數： | 7/8頁 |
| 文件大小： | 417K |
| 描述： | IC SW HOTSWAP -48V SWAPPER 8SOIC |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 100 |
| 系列： | Simple Swapper™ |
| 類型： | 熱交換開關 |
| 應用： | IP 電話，LAN 網絡供電，網絡路由器和交換機 |
| 內部開關： | 是 |
| 電流限制： | 280mA |
| 電源電壓： | -16 V ~ -65 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SOIC |
| 包裝： | 管件 |
-48V Simple Swapper Hot-Swap Switches
_______________________________________________________________________________________ 7
heat dissipation properties, and always solder all of its
V
IN
pins to a large section of circuit board copper.
Logic Control
The enable input responds to +3.3V logic signals and
will force the internal FET off if it is pulled low. This fea-
ture allows the host to disconnect the load from the
power bus if required. Additionally, all fault conditions
that latch the internal FET off must be cleared by puls-
ing ENABLE low for at least 200ns, then reasserting
ENABLE before normal operation can resume.
GATE Connections
GATE connects to the gate of the internal N-channel
power MOSFET. Normally this pin should be left open
circuit. To slow down the voltage ramp at V
OUT
, con-
nect capacitors from GATE to V
OUT
and V
IN
. Size the
capacitors so that the GATE to V
IN
capacitor is ten
times the size of the GATE to V
OUT
capacitor. This
technique to slow down the output voltage ramp will
also cause the output discharge time to increase if the
capacitor values exceed about 1nF. Additionally, this
technique will cause the time delay for a power-not-
good fault to increase.
FAULT Output
The FAULT output is open-drain and is pulled low if the
MAX5911/MAX5912 detect an undervoltage fault, a
thermal fault, a power-not-good fault, or a zero-current
fault. See the Normal Operation section for specific
details of fault operation. Connect FAULT to the logic
supply with a pullup resistor; 3.3k& is sufficient in most
cases.
Changing the Undervoltage
Lockout Setting
The UVLO value defaults to -28V if the UVLO pin is left
open circuit. The lockout voltage can be changed with
a resistive divider. Connect the divider from V
IN
to
AGND, and connect the center node of the divider to
the UVLO pin. Figure 2 shows an example circuit. Use
R1 d 10k&, then calculate R2 using:
where V
IN(UVLO)
is the desired lockout voltage.
Chip Information
TRANSISTOR COUNT: 1021
PROCESS: BiCMOS
R R x
V
IN UVLO
2 1
1 258
1
=
?/DIV>
?/DIV>
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?/DIV>
?/DIV>
?/DIV>
?/DIV>
.
(
)
-
Figure 2. UVLO Voltage Set by an External Resistive Divider
V
IN
UVLO
FAULT
ENABLE
DGND
AGND
POSITIVE
LOGIC
0.1礔
3.3k&
R1
R2
+3.3V
V
OUT
LOAD
V
IN
(-16V TO -65V)
MAX5911
MAX5912
CHOOSE R1 10k&, THEN CALCULATE R2 USING: R2 = R1 - 1
V
IN (UVLO)
1.258
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MAX5911ESA+ | 功能描述:熱插拔功率分布 48V- Hot-Swap Controller RoHS:否 制造商:Texas Instruments 產品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
| MAX5911ESA+T | 功能描述:熱插拔功率分布 48V- Hot-Swap Controller RoHS:否 制造商:Texas Instruments 產品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
| MAX5911ESA-T | 功能描述:熱插拔功率分布 RoHS:否 制造商:Texas Instruments 產品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
| MAX5911EVKIT# | 制造商:Maxim Integrated Products 功能描述:MAX5911EVKIT# 制造商:Maxim Integrated Products 功能描述:Power Management IC Development Tools MAX5911EVKIT# |
| MAX5912ESE | 功能描述:熱插拔功率分布 RoHS:否 制造商:Texas Instruments 產品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
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