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參數資料
型號: MAX5948BESA+T
廠商: Maxim Integrated
文件頁數: 8/18頁
文件大小: 182K
描述: IC CNTRLR HOT SWAP 8-SOIC
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
類型: 熱交換控制器
應用: 通用
內部開關:
電源電壓: -20 V ~ -80 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 8-SOIC
包裝: 帶卷 (TR)
-48V Hot-Swap Controllers
with External R
SENSE
8  _______________________________________________________________________________________
Power-Supply Ramping
The MAX5948A/MAX5948B can reside either on the
backplane or the removable circuit board (Figure 6a).
Power is delivered to the load by placing an external
n-channel MOSFET pass transistor in the power-
supply path.
After the circuit board is inserted into the backplane and
the supply voltage at V
EE
is stable and within the under-
voltage and overvoltage tolerance, the MAX5948A/
MAX5948B turn on Q1. The MAX5948A/MAX5948B grad-
ually turn on the external MOSFET by charging the gate
of Q1 with a 45礎 current source. Capacitor C2 provides
a feedback signal to accurately limit the inrush current.
The inrush current can be calculated:
I
INRUSH
= (I
PU
x C
L
)/C2
where C
L
is the total load capacitance, C3 + C4, and
I
PU
is the MAX5948_ gate pullup current.
Figure 6b shows the inrush current waveform. The cur-
rent through C2 controls the GATE voltage. At the end
of the DRAIN ramp, the GATE voltage is charged to its
final value. The GATE-to-SENSE clamp limits the maxi-
mum V
GS
to about 18V under any condition.
Board Removal
If the card is removed from a live backplane, the output
capacitor on the card may not be immediately discharged.
While the output capacitor is discharging, the MAX5948_
continues to operate as if the input supply were still con-
nected because the output capacitor temporarily supplies
operating current to the IC. If the circuit is connected as in
Figure 7a, the voltage at the UV pin falls below the UVLO
detect threshold, and the MAX5948_ turns off the external
MOSFET. If R4 in the circuit is connected directly to the -
48V return, the external MOSFET remains on until the
capacitor is discharged sufficiently to drop the UV pin volt-
age to the UVLO detect threshold.
In either case, when the MOSFET is turned off, the output
capacitor continues to discharge by the IC supply current
I
DD
. The I
DD
flows into the IC at the V
DD
terminal, out at the
V
EE
terminal, and back to the capacitor through the sub-
strate diode of the external MOSFET. There is also a paral-
lel current path between the V
EE
and DRAIN terminals
through multiple internal ESD-protection diodes. The pro-
tection circuit built into the IC allows the DRAIN terminal
voltage to drop below that of the V
EE
terminal so long as
the absolute maximum allowed DRAIN terminal current
(-100mA) is not exceeded. As I
DD
is only 2mA maximum,
this limiting current will not even be approached.
LOGIC
AND
GATE DRIVE
V
CC
 AND
REFERENCE
GENERATOR
REF
V
CC
REF
V
PG
V
EE
50mV
V
DD
UV
OV
V
EE
SENSE
GATE
DRAIN
PWRGD
PWRGD
MAX5948A
MAX5948B
OUTPUT
DRIVE
Block Diagram
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相關代理商/技術參數
參數描述
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MAX5949AESA-T 功能描述:熱插拔功率分布 RoHS:否 制造商:Texas Instruments 產品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube
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