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參數資料
型號: MAX810xTR
廠商: ON SEMICONDUCTOR
元件分類: 復位半導體
英文描述: 3-Pin Microprocessor Reset Monitors
中文描述: 3引腳單片機復位監控器
文件頁數: 4/8頁
文件大小: 119K
代理商: MAX810XTR
MAX809, MAX810
http://onsemi.com
4
APPLICATIONS INFORMATION
VCC Transient Rejection
The MAX809/810 provides accurate V
CC
monitoring and
reset timing during power–up, power–down, and
brownout/sag conditions, and rejects negative–going
transients (glitches) on the power supply line. Figure 1
shows the maximum transient duration vs. maximum
negative excursion (overdrive) for glitch rejection. Any
combination of duration and overdrive which lies
under
the
curve will
not
generate a reset signal. Combinations above
the curve are detected as a brownout or power–down.
Transient immunity can be improved by adding a capacitor
in close proximity to the V
CC
pin of the MAX809/810.
Figure 1. Maximum Transient Duration vs. Overdrive
for Glitch Rejection at 25
°
C
Duration
VTH
Overdrive
VCC
TA = +25
°
C
MAX8xxL/M/J
1
10
100
1000
0
90
160
240
320
400
M
RESET COMPARATOR OVERDRIVE,
(VTH – VCC (mV)
MAX8xxR/S/T
RESET Signal Integrity During Power–Down
The MAX809 RESET output is valid to V
CC
= 1.0V.
Below this voltage the output becomes an ”open circuit” and
does not sink current. This means CMOS logic inputs to the
μ
P will be floating at an undetermined voltage. Most digital
systems are completely shutdown well above this voltage.
However, in situations where RESET must be maintained
valid to V
CC
= 0V, a pull–down resistor must be connected
from RESET to ground to discharge stray capacitances and
hold the output low (Figure 2). This resistor value, though
not critical, should be chosen such that it does not
appreciably load RESET under normal operation (100k
will be suitable for most applications). Similarly, a pull–up
resistor to V
CC
is required for the MAX810 to ensure a valid
high RESET for V
CC
below 1.0V.
VCC
VCC
RESET
R1
100 k
MAX809
GND
Figure 2. Ensuring RESET Valid to VCC = 0 V
Processors With Bidirectional I/O Pins
Some
μ
P’s (such as Motorola 68HC11) have
bi–directional reset pins. Depending on the current drive
capability of the processor pin, an indeterminate logic level
may result if there is a logic conflict. This can be avoided
by adding a 4.7k resistor in series with the output of the
MAX809/810 (Figure 3). If there are other components in
the system which require a reset signal, they should be
buffered so as not to load the reset line. If the other
components are required to follow the reset I/O of the
μ
P, the
buffer should be connected as shown with the solid line.
VCC
MAX809
VCC
P
RESET
GND
GND
47 k
Figure 3. Interfacing to Bidirectional Reset I/O
RESET
VCC
BUFFERED RESET
TO OTHER SYSTEM
COMPONENTS
BUFFER
相關PDF資料
PDF描述
MAX809 Octal Bus Transceivers With 3-State Outputs 20-CDIP -55 to 125
MAX823SEXK Coaxial switch for checking (Halogen free); HRS No: 358-0174-3 00; Connector Type: Cable; Contact Gender: Male; Termination Style: Soldering; Impedance (ohm): 50; Frequency Range (GHz): 0 to 6; Power Capacity (W): 2; VSWR (Max): 1.8; Mating/Unmating Cycles: 500; Contact Mating Area Plating: Gold; Operating Temperature Range (degrees C): -40 to 85
MAX823 8-Bit Parallel-Out Serial Shift Registers 14-CFP -55 to 125
MAX823_EUK Parallel-Load 8-Bit Shift Registers 20-LCCC -55 to 125
MAX823SEUK-T IC-SMD-MPU SUPERVISORY CIRCUIT
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