1.2A PWM Step-Down Converter in
2mm x 2mm WLP/UCSP for PA Power
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Pin Description
PIN    NAME
FUNCTION
A1    REFBP
Reference Noise Bypass. Bypass REFBP to AGND with a 0.22礔 ceramic capacitor to reduce noise on the
LDO outputs. REFBP is internally pulled down through a 1k& resistor during shutdown.
A2    AGND
Low-Noise Analog Ground. Connect AGND to PGND using a common ground plane. Refer to the
MAX8805W Evaluation Kit for more information.
A3    N.I.C.  Not Internally Connected. Connect to AGND for improved thermal performance.
A4    PGND
Power Ground for PA Step-Down Converter. Connect AGND to PGND using a common ground plane. Refer
to the MAX8805W Evaluation Kit for more information.
B1    LDO2
200mA LDO Regulator 2 Output. Bypass LDO2 with a 1礔 ceramic capacitor as close as possible to LDO2
and AGND. LDO2 is internally pulled down through a 1k& resistor when this regulator is disabled.
B2    PA_EN
PA Step-Down Converter Enable. Active-high enable input. Connect to IN1A/IN1B or logic-high for normal
operation. Pulled down to ground through an internal 800k& resistor.
B3
EN2
LDO2 Enable. Active-high enable input. Connect to IN2 or logic-high for normal operation. Pulled down to
ground through an internal 800k& resistor.
B4
LX   Inductor Connection. Connect an inductor from LX to the output of the PA step-down converter.
C1
IN2
Supply Voltage Input for LDO2 and Internal Reference. Connect IN2 to a battery or supply voltage from
2.7V to 5.5V. Bypass IN2 with a 2.2礔 ceramic capacitor as close as possible to IN2 and AGND. Connect
IN2 to the same source as IN1A and IN1B.
C2
HP   PA Output Voltage Select. Pulled down to ground through an internal 800k& resistor.
C3, C4
IN1B,
IN1A
Supply Voltage Input for PA Step-Down Converter. Connect IN1_ to a battery or supply voltage from 2.7V to
5.5V. Bypass the connection of IN1_ with a 4.7礔 ceramic capacitor as close as possible to IN1_ and
PGND. IN1A
and IN1B are internally connected together. Connect IN1_ to the same source as IN2.
D1
N.C.   Internally Connected to IN2. Do not connect to this pin.
D2
T.P.
Test Point. This pin is used internally for factory test. This pin must be either externally connected to AGND
or unconnected. This pin has an internal 120k& pulldown to AGND.
D3, D4  PAB, PAA
PA Connection for Bypass Mode. Internally connected to IN1_ using the internal bypass MOSFET during
bypass mode. PA_ is connected to the internal feedback network. Bypass PA_ with a 4.7礔 ceramic
capacitor as close as possible to PA_ and PGND.