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參數資料
| 型號： | MAX9325EQI+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數： | 1/12頁 |
| 文件大小： | 0K |
| 描述： | IC CLK/DATA BUFF MUX 2:8 28-PLCC |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 500 |
| 類型： | 扇出緩沖器（分配），多路復用器，數據 |
| 電路數： | 1 |
| 比率 - 輸入:輸出： | 2:8 |
| 差分 - 輸入:輸出： | 是/是 |
| 輸入： | HSTL，LVECL，LVPECL |
| 輸出： | LVECL，LVPECL |
| 頻率 - 最大： | 700MHz |
| 電源電壓： | 2.375 V ~ 3.8 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-LCC（J 形引線） |
| 供應商設備封裝： | 28-PLCC（11.51x11.51） |
| 包裝： | 帶卷 (TR) |
General Description
The MAX9325 low-skew, 2:8 differential driver features
extremely low output-to-output skew (50ps max) and
part-to-part skew (225ps max). These features make
the device ideal for clock and data distribution across a
backplane or board. The device selects one of the two
differential HSTL or LVECL/LVPECL inputs and repeats
them at eight differential outputs. Outputs are compati-
ble with LVECL and LVPECL, and can directly drive
50 terminated transmission lines.
The differential inputs can be configured to accept a
single-ended signal when the unused complementary
input is connected to the on-chip reference output volt-
age VBB. All inputs have internal pulldown resistors to
VEE. The internal pulldowns and a fail-safe circuit
ensure differential low default outputs when the inputs
are left open or at VEE.
The MAX9325 operates over a 2.375V to 3.8V supply
range for interfacing to differential HSTL and LVPECL
signals. This allows high-performance clock or data dis-
tribution in systems with a nominal +2.5V or +3.3V sup-
ply. For LVECL operation, the device operates with a
-2.375V to -3.8V supply.
The MAX9325 is offered in 28-lead PLCC and space-
saving 28-lead QFN packages. The MAX9325 is speci-
fied for operation from -40°C to +85°C.
Applications
Precision Clock Distribution
Low-Jitter Data Repeaters
Features
50ps (max) Output-to-Output Skew
1.5psRMS (max) Random Jitter
Guaranteed 300mV Differential Output at 700MHz
+2.375V to +3.8V Supplies for Differential
HSTL/LVPECL
-2.375V to -3.8V Supplies for Differential LVECL
Two Selectable Differential Inputs
On-Chip Reference for Single-Ended Inputs
Outputs Low for Inputs Open or at VEE
Pin Compatible with MC100LVE310
MAX9325
2:8 Differential LVPECL/LVECL/HSTL Clock and
Data Driver
________________________________________________________________ Maxim Integrated Products
1
28
27
26
25
24
23
22
Q0
Q1
V
CC
Q1
Q2
8
9
10
11
12
13
14
N.C.
Q7
V
CC
Q7
Q6
15
16
17
18
19
20
21
Q5
*CORNER PINS AND EXPOSED PAD ARE CONNECTED TO VEE.
Q5
Q4
VCC
Q4
Q3
7
6
5
4
3
2
1
CLK1
VBB
VCC
CLKO
CLK_SEL
VEE
MAX9325
QFN
Q0
Q1
V
CC
Q2
N.C.
V
CC
Q7
Q6
Q5
VCC
Q4
Q3
CLK1
VBB
VCC
CLKO
CLK_SEL
VEE
Q5
Q4
Q3
CLKO
CLK1
Q7
Q6
Q2
Q1
Q0
PLCC
TOP VIEW
56
7
8
9
10
11
22
23
24
25
19
20
21
12
13
14
15
16
17
18
26
27
28
1
2
3
4
MAX9325
*
CLK_SEL
INPUT CLOCK
INPUT SELECT TRUTH TABLE
L
H
CLK0, CLK0 SELECTED
CLK1, CLK1 SELECTED
Pin Configurations
Ordering Information
19-2511; Rev 3; 11/04
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Functional Diagram appears at end of data sheet.
PART
TEMP RANGE
PIN-PACKAGE
MAX9325EQI
-40°C to +85
°C
28 PLCC
MAX9325EGI
-40°C to +85
°C
28 QFN 5mm x 5mm
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MAX9325EVKIT | 制造商:Maxim Integrated Products 功能描述:2:8 DIFFERENTIAL LVPECL/LVECL/HSTL CLOCK AND DATA DRIVER - Boxed Product (Development Kits) |
| MAX9326EGI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| MAX9326EQI | 制造商:Maxim Integrated Products 功能描述:1:9 DIFFERENTIAL LVPECL/LVECL/HSTL CLOCK AND - Rail/Tube |
| MAX9326EQI+ | 制造商:Maxim Integrated Products 功能描述:CLOCK AND DATA DRVR 28PLCC - Rail/Tube |
| MAX9326EQI+T | 制造商:Maxim Integrated Products 功能描述:CLOCK AND DATA DRVR 28PLCC - Tape and Reel |
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