
General Description
The MAX9424–MAX9427 high-speed, low-skew quad
PECL-to-ECL translators are designed for high-speed
data and clock driver applications. These devices feature
an ultra-low 0.24ps
(RMS)
random jitter and channel-to-
channel skew is less than 90ps in asynchronous mode.
The four channels can be operated synchronously with
an external clock, or in asynchronous mode determined
by the state of the SEL input. An enable input provides
the ability to force all the outputs to a differential low state.
The parts differ from one another by their input and out-
put termination options. The input options are an open
input or an internal differential 100
termination. The
output options are an open-emitter output or a series
50
termination. See
Ordering Information
.
The MAX9424–MAX9427 operate from a positive voltage
supply of +2.375V to +5.5V, and a negative supply volt-
age of -2.375V to -5.5V and operate across the extended
temperature range of -40°C to +85°C. They are offered in
32-pin 5mm x 5mm TQFP and space-saving 5mm x 5mm
QFN packages.
Applications
Data and Clock Driver and Buffer
Central Office Backplane Clock Distribution
DSLAM Backplane
Base Station
ATE
Features
o
0.24ps RMS Added Random Jitter
o
10ps Channel-to-Channel Skew in Synchronous
Mode
o
Guaranteed 500mV Differential Output at 3GHz
Clock Frequency
o
420ps Propagation Delay in Asynchronous Mode
o
Functionally Compatible with
SK4426 (MAX9424)
SK4430 (MAX9425)
SK4436 (MAX9426)
SK4440 (MAX9427)
o
Integrated 50
Outputs (MAX9425/MAX9427)
o
Integrated 100
Inputs (MAX9426/MAX9427)
o
Synchronous/Asynchronous Operation
M
Lowest Jitter Quad PECL-to-ECL
Differential Translators
________________________________________________________________
Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX9424
MAX9425
MAX9426
MAX9427
TQFP (5mm x 5mm)
TOP VIEW
32
28
29
30
31
25
26
27
I
V
G
O
O
I
V
E
I
I
10
13
15
14
16
11
12
9
I
V
G
O
I
V
E
17
18
19
20
21
22
23 OUT1
24 V
GG
OUT1
V
EE
V
EE
OUT2
OUT2
V
GG
2
3
4
5
6
7
8
V
CC
EN
CLK
SEL
1
V
CC
SEL
CLK
EN
I
O
I
3
3
3
2
2
2
2
I
I
V
G
O
O
V
E
I
2
I
9
1
1
1
1
1
1
I
I
V
G
O
O
V
E
I
1
I
17
18
19
20
21
22
23
V
GG
NOTE:
CORNER PINS ARE CONNECTED TO V
GG
.
OUT2
OUT2
V
EE
V
EE
OUT1
OUT1
8
7
6
5
4
3
2
V
CC
EN
EN
CLK
CLK
SEL
SEL
MAX9424
MAX9425
MAX9426
MAX9427
QFN
1
V
CC
24
V
GG
TOP VIEW
*
*
*
*
Pin Configurations
Ordering Information
19-2390; Rev 0; 4/02
*
Future product—contact factory for availability.
PART
TEMP
RANGE
PIN-
PACKAGE
INPUT
(IN_,
IN_
)
Open
Open
Open
Open
100
100
100
100
OUTPUT
(OUT_,
OUT_
)
Open
Open
50
50
Open
Open
50
50
MAX9424
EHJ -40
°
C to +85
°
C
MAX9424EGJ* -40
°
C to +85
°
C
MAX9425
EHJ -40
°
C to +85
°
C
MAX9425EGJ* -40
°
C to +85
°
C
MAX9426
EHJ -40
°
C to +85
°
C
MAX9426EGJ* -40
°
C to +85
°
C
MAX9427
EHJ -40
°
C to +85
°
C
MAX9427EGJ* -40
°
C to +85
°
C
32 TQFP
32 QFN
32 TQFP
32 QFN
32 TQFP
32 QFN
32 TQFP
32 QFN