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參數資料
| 型號： | MB90246APFV |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-bit Proprietary Microcontroller |
| 中文描述： | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, LQFP-100 |
| 文件頁數： | 88/100頁 |
| 文件大小： | 1956K |
| 代理商： | MB90246APFV |
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88
MB90246A Series
Table 0 Signed multiplication/division (Word, Long) [11 Instructions]
For (b) and (c), refer to “Table 5 Correction Values for Number of Cycles for Calculating Actual Number of Cycles.”
*1: Set to 3 for divide-by-0, 8 or 18 for an overflow, and 18 for normal operation.
*2: Set to 3 for divide-by-0, 10 or 21 for an overflow, and 22 for normal operation.
*3: Set to 4 + (a) for divide-by-0, 11 + (a) or 22 + (a) for an overflow, and 23 + (a) for normal operation.
*4: Positive divided: Set to 4 for divide-by-0, 10 or 29 for an overflow, and 30 for normal operation.
Negative divided: Set to 4 for divide-by-0, 11 or 30 for an overflow, and 31 for normal operation.
*5: Positive divided: Set to 4 + (a) for divide-by-0, 11 + (a) or 30 + (a) for an overflow, and 31 + (a) for normal operation.
Negative divided: Set to 4 + (a) for divide-by-0, 12 + (a) or 31 + (a) for an overflow, and 32 + (a) for normal
operation.
*6: Set to (b) when the division-by-0 or an overflow, and 2
×
(b) for normal operation.
*7: Set to (c) when the division-by-0 or an overflow, and 2
×
(c) for normal operation.
*8: Set to 3 when byte (AH) is zero, 12 when the result is positive, and 13 when the result is negative.
*9: Set to 3 when byte (ear) is zero, 12 when the result is positive, and 13 when the result is negative.
*10:Set to 4 + (a) when byte (eam) is zero, 13 + (a) when the result is positive, and 14 + (a) when the result is negative.
*11:Set to 3 when word (AH) is zero, 12 when the result is positive, and 13 when the result is negative.
*12:Set to 3 when word (ear) is zero, 16 when the result is positive, and 19 when the result is negative.
*13:Set to 4 + (a) when word (eam) is zero, 17 + (a) when the result is positive, and 20 + (a) when the result is negative.
Note: When overflow occurs during DIV or DIVW instruction execution, the number of execution cycles takes two
values because of detection before and after an operation.
When overflow occurs during DIV or DIVW instruction execution, the contents of AL are destroyed.
Mnemonic
A
#
2
~
*1
B
0
Operation
LH AH
Z
I
–
S
–
T
–
N
–
Z
–
V
*
C RMW
*
DIV
word (AH)/byte (AL)
Quotient
→
byte (AL)
Remainder
→
byte (AH)
word (A)/byte (ear)
Quotient
→
byte (A)
Remainder
→
byte (ear)
*6 word (A)/byte (eam)
Quotient
→
byte (A)
Remainder
→
byte (eam)
0
long (A)/word (ear)
Quotient
→
word (A)
Remainder
→
word (ear)
*7 long (A)/word (eam)
Quotient
→
word (A)
Remainder
→
word (eam)
0
byte (AH)
×
byte (AL)
→
word (A) –
0
byte (A)
×
byte (ear)
→
word (A)
2 + *10 (b)
byte (A)
×
byte (eam)
→
word (A)
2
*11
0
word (AH)
×
word (AL)
→
long (A)
2
*12
0
word (A)
×
word (ear)
→
long (A)
2 + *13 (b) word
(A)
×
word
(eam)
→
long
(A)
–
–
DIV
A, ear
2
*2
0
Z
–
–
–
–
–
–
*
*
–
DIV
A, eam
2 +
*3
Z
–
–
–
–
–
–
*
*
–
DIVW
A, ear
2
*4
–
–
–
–
–
–
–
*
*
–
DIVW
A, eam
2 +
*5
–
–
–
–
–
–
–
*
*
–
MUL
MUL
MUL
MULW
MULW
MULW
A
A, ear
A, eam
A
A, ear
A, eam
2
2
*8
*9
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
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