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參數資料
| 型號： | MB91133PMT2 |
| 廠商： | Fujitsu Limited |
| 元件分類： | 微控制器 |
| 英文描述： | 32-Bit RISC Microcontroller |
| 中文描述： | 32位RISC微控制器 |
| 文件頁數： | 85/123頁 |
| 文件大?。?/td> | 1362K |
| 代理商： | MB91133PMT2 |
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MB91133/MB91F133
85
17. FLASH Memory
The MB91FV130 / MB91F133 have a 254-KB (2 Mbit) capacity and feature a FLASH memory that can write
each half-word (16 bits) using the FR-CPU, delete individual sectors sector and delete groups of sectors together
using a single 3-V power source.
Outline of FLASH Memory
This is a built-in 3-V 254-KB FLASH memory. This FLASH memory is the same as our 2-Mbit (256 K
×
8
/
128
K
×
16) FLASH memory MBM29LV400C and writing is possible from outside the device using a ROM writer. If
used as a built-in ROM of the FR-CPU, as well as having an equivalent function to the MBM29LV400C, instruc-
tions
/
data can be read per word (32 bits) and high-speed operation of the device can be realized.
Refer to the MBM29LV400C data sheet as well as this manual.
The following functions can be realised in MB91FV130 / MB91F133 by combining the FLASH memory macro
and FR-CPU interface circuits.
Functioning as memory for CPU program
/
data storage
Access is possible with 32-bit bus width when used as ROM
Reading
/
writing and erasing (automatic program algorithm
*
) are possible using CPU
MBM29LV400C-equivalent function of single FLASH memory products
Reading
/
writing and erasing (automatic program algorithm
*
) are possible using ROM writer
A case where this FLASH memory is used from FR-CPU is described in this section.
Refer to the ROM writer manual separately for details if this FLASH memory is used from ROM writer.
* : Automatic program algorithm
=
Embedded Algorithm
TM
Embedded Algorithm
TM
is the trademark of Advanced Micro Device.
Block Diagram
RDY/BUSY
RESET
BYTE
OE
WE
CE
FA18 - 0
Address buffer
Data buffer
CA18 - 0
I
B
INTE
RDYINT
RDY
WE
FR-C bus (instruction / data)
Rising edge detection
Control signal
generation
CD31 - 0
DI15 - 0
FLASH memory
2 Mbit (254 K
×
8/127 K
×
16)
DO31 - 0
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相關代理商/技術參數 |
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