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參數(shù)資料
型號: MB91314APMC-GE1
元件分類: 微控制器/微處理器
英文描述: 32-BIT, MROM, 33 MHz, RISC MICROCONTROLLER, PQFP120
封裝: 16 X 16 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-120
文件頁數(shù): 1/73頁
文件大小: 810K
代理商: MB91314APMC-GE1
DS07-16802-1E
FUJITSU SEMICONDUCTOR
DATA SHEET
Copyright2007 FUJITSU LIMITED All rights reserved
“Check Sheet” is seen at the following support page
URL : http://www.fujitsu.com/global/services/microelectronics/product/micom/support/index.html
“Check Sheet” lists the minimal requirement items to be checked to prevent problems beforehand in system
development.
Be sure to refer to the “Check Sheet” for the latest cautions on development.
32-bit Microcontroller
CMOS
FR60 MB91314A Series
MB91314A/MB91F314
■ DESCRIPTION
The FR family* is a line of single-chip microcontrollers based on the 32-bit high-performance RISC CPU while
integrating a variety of I/O resources for embedded control applications which require high-performance, high-
speed CPU processing.
The FR family contains multiple channels of data slicer and communication macros, best suited for embedded
applications such as TV control.
* : FR, the abbreviation of FUJITSU RISC controller, is a line of products of FUJITSU Limited.
■ FEATURES
1.
FR CPU
32-bit RISC, load/store architecture with a five-stage pipeline
Operating frequency 33 MHz [PLL used : Oscillation frequency 16.5 MHz : Doubled]
16-bit fixed length instructions (basic instructions), 1 instruction per cycle
Instruction set optimized for embedded applications : Memory-to-memory transfer, bit manipulation, barrel shift
instructions etc.
Instructions adapted for high-level languages : Function entry/exit instructions, multiple-register load/store
instructions
Register interlock functions : Facilitating coding in assemblers
On-chip multiplier supported at the instruction level
Signed 32-bit multiplication : 5 cycles
Signed 16-bit multiplication : 3 cycles
(Continued)
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