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參數資料
| 型號： | MB91F133PMT2 |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-Bit RISC Microcontroller |
| 中文描述： | 32-BIT, FLASH, 33 MHz, RISC MICROCONTROLLER, PQFP144 |
| 封裝： | PLASTIC, LQFP-144 |
| 文件頁數： | 59/123頁 |
| 文件大小： | 1362K |
| 代理商： | MB91F133PMT2 |
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MB91133/MB91F133
59
6.
Multifunction Timer
The multifunction timer unit is configured of a 16-bit freerun timer
×
1, 16-bit output compare
×
8, 16-bit input
capture
×
4, 16-bit PPG timer
×
6 ch and waveform generation area modules. 12 independent waveform outputs
based on a 16-bit free-run timer are possible using this function and measurement of input pulse width and
external clock cycle is also possible.
Multifunction Timer Configuration
16-bit free-run timer (
×
1)
The 16-bit free-run timer consists of a 16-bit up counter, control register, 16-bit compare clear register and
pre-scalar. Output values of this counter are used as the base timer for output compare and input capture.
Counter operation clocks can be selected from six types.
Six types of internal clocks (
φ
2,
φ
4,
φ
8,
φ
16,
φ
32,
φ
64)
φ
: Machine clock
Interruption can be generated by overflow of the counter value and a compared match with compare
clear register. (Mode setting is required for a compared match.)
Counter value can be initialized to “0000
H
” by a compared match with the reset, software clear or the
compare clear register.
Output compare (
×
8)
Output compare is configured of 16-bit compare register
×
8, latch for compare output and control register.
Interruption can be generated as well as reversing output level when the 16-bit free-run timer value and compare
register value match.
8 compare registers can be operated independently. Output pins and interruption flags support each
compare register.
Output pins can be controlled by pairing two compare registers. Output pins are reversed using two
compare registers.
Initial value of each output pin can be set.
Interruption can be generated by matching compare.
Input capture (
×
4)
Input capture is configured with four independent external input pins , supported capture and control register.
16-bit free-run timer value is held in the capture register by detecting the random edge of signals that are input
by the external input pin, and interruption can simultaneously be generated.
Valid edges (rising edge, falling edge, both edges) of external input signals can be selected.
Four input captures can be operated independently.
Interruption can be generated by the valid edges of external input signals.
16-bit PPG timer (
×
6)
Refer to PPG timer
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