
Application Information
(Continued)
as high as possible. Two zeroes f
and f
are placed at the
double pole frequency to cancel the double pole phase lag.
Then, a pole, f
P1
is placed at the frequency of the ESR zero.
A final pole f
is placed at one-half of the switching fre-
quency. The gain of the error amplifier transfer function is
selected to give the best bandwidth possible without violat-
ing the Nyquist stability criteria. In practice, a good crossover
point is one-fifth of the switching frequency, or 60 kHz for this
example. The generic equation for the error amplifier transfer
function is:
In this equation the variableA
is a ratio of the values of the
capacitance and resistance of the compensation compo-
nents, arranged as shown in
Figure 13
. A
is selected to
provide the desired bandwidth. A starting value of 80,000 for
A
should give a conservative bandwidth. Increasing the
value will increase the bandwidth, but will also decrease
phase margin. Designs with 45-60 are usually best because
they represent a good trade-off between bandwidth and
phase margin. In general, phase margin is lowest and gain
highest (worst-case) for maximum input voltage and mini-
mum output current. One method to select A
EA
is to use an
iterative process beginning with these worst-case conditions.
1.
Increase A
EA
2.
Check overall bandwidth and phase margin
3.
Change V
IN
to minimum and recheck overall bandwidth
and phase margin
4.
Change I
O
to maximum and recheck overall bandwidth
and phase margin
The process ends when the both bandwidth and the phase
margin are sufficiently high. For this example input voltage
can vary from 3.0 to 3.6V and output current can vary from 0
to 4A, and after a few iterations a moderate gain factor of
101dB is used.
The error amplifier of the LM2747 has a unity-gain band-
width of 9 MHz. In order to model the effect of this limitation,
the open-loop gain can be calculated as:
The new error amplifier transfer function that takes into
account unity-gain bandwidth is:
The gain and phase of the error amplifier are shown in
Figure 15
.
In VM regulators, the top feedback resistor R
FB2
forms a part
of the compensation. Setting R
to 10 k
±
1%, usually
gives values for the other compensation resistors and ca-
pacitors that fall within a reasonable range. (Capacitances
>
1 pF, resistances
<
1 M
) C
, C
, C
, R
, and R
are
selected to provide the poles and zeroes at the desired
frequencies, using the following equations:
20150974
20150975
FIGURE 15. Error Amp. Gain and Phase
L
www.national.com
17