參數資料
| 型號： | MC100EL29DWG |
| 廠商： | ON Semiconductor |
| 文件頁數： | 1/6頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FLIP FLOP ECL DUAL DFF 20SOIC |
| 標準包裝： | 38 |
| 系列： | 100EL |
| 功能： | 設置（預設）和復位 |
| 類型： | D 型 |
| 輸出類型： | 差分 |
| 元件數： | 2 |
| 每個元件的位元數： | 1 |
| 延遲時間 - 傳輸： | 500ps |
| 觸發(fā)器類型： | 正邊沿 |
| 電源電壓： | 4.2 V ~ 5.7 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 包裝： | 管件 |
| 其它名稱： | MC100EL29DWGOS |
Semiconductor Components Industries, LLC, 2006
October, 2006 Rev. 4
1
Publication Order Number:
MC100EL29/D
MC100EL29
5VECL Dual Differential
Data and Clock D FlipFlop
With Set and Reset
Description
The MC100EL29 is a dual masterslave flip flop. The device
features fully differential Data and Clock inputs as well as outputs.
Data enters the master latch when the clock is LOW and transfers to
the slave upon a positive transition on the clock input.
The VBB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
and VCC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.
The differential inputs have special circuitry which ensures device
stability under open input conditions. When both differential inputs
are left open the D input will pull down to VEE and the D input will
bias around VCC/2. The outputs will go to a defined state, however the
state will be random based on how the flip flop powers up.
Both flip flops feature asynchronous, overriding Set and Reset
inputs. Note that the Set and Reset inputs cannot both be HIGH
simultaneously.
The 100 Series Contains Temperature Compensation
Features
1100 MHz FlipFlop Toggle Frequency
580 ps Propagation Delays
Q Output will Default LOW with Inputs Open or at VEE
PECL Mode Operating Range: VCC = 4.2 V to 5.7 V
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = 4.2 V to 5.7 V
Internal Input Pulldown Resistors on D(s), CLK(s), S(s), and R(s).
ESD Protection: Human Body Model; > 2 kV,
Machine Model; > 100 V
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level:
Pb = 1
PbFree = 3
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V0 @ 1.125 in,
Oxygen Index: 28 to 34
Transistor Count = 313 devices
PbFree Package is Available*
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
MARKING DIAGRAM*
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
SO20
WB SUFFIX
CASE 751D
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G= PbFree Package
20
1
100EL29
AWLYYWWG
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MC100EL29DWR2 | 功能描述:觸發(fā)器 5V ECL Dual Diff RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| MC100EL29DWR2G | 功能描述:觸發(fā)器 5V ECL Dual Diff Data And Clk D-Type RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| MC100EL30 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:5V ECL Triple D Flip−Flop with Set and Reset |
| MC100EL30_06 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:5V ECL Triple D Flip−Flop with Set and Reset |
| MC100EL30DW | 功能描述:觸發(fā)器 5V ECL Triple D-Type RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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