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參數(shù)資料
| 型號： | MC100EL31DTR2G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 1/9頁 |
| 文件大小： | 0K |
| 描述： | IC FLIP FLOP SET/RST ECL 8-TSSOP |
| 標準包裝： | 2,500 |
| 系列： | 100EL |
| 功能： | 設(shè)置（預(yù)設(shè)）和復(fù)位 |
| 類型： | D 型 |
| 輸出類型： | 差分 |
| 元件數(shù)： | 1 |
| 每個元件的位元數(shù)： | 1 |
| 頻率 - 時鐘： | 2.8GHz |
| 延遲時間 - 傳輸： | 465ps |
| 觸發(fā)器類型： | 正邊沿 |
| 電源電壓： | 4.2 V ~ 5.7 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 包裝： | 帶卷 (TR) |
Semiconductor Components Industries, LLC, 2008
August, 2008 Rev. 6
1
Publication Order Number:
MC10EL31/D
MC10EL31, MC100EL31
5 VECL D Flip‐Flop
With Set and Reset
The MC10EL/100EL31 is a D flip-flop with set and reset. The
device is functionally equivalent to the E131 device with higher
performance capabilities. With propagation delays and output
transition times significantly faster than the E131, the EL31 is ideally
suited for those applications which require the ultimate in AC
performance.
Both set and reset inputs are asynchronous, level triggered signals.
Data enters the master portion of the flip-flop when clock is LOW and
is transferred to the slave, and thus the outputs, upon a positive
transition of the clock.
The 100 Series contains temperature compensation.
Features
475 ps Propagation Delay
2.8 GHz Toggle Frequency
ESD Protection: > 1 kV Human Body Model,
> 100 V Machine Model
PECL Mode Operating Range: VCC = 4.2 V to 5.7 V
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = 4.2 V to 5.7 V
Internal Input Pulldown Resistors on D, CLK, S, and R
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V0 @ 0.125 in,
Oxygen Index: 28 to 34
Metastability 125 ps (see Application Note AN1504)
Transistor Count = 79 devices
PbFree Packages are Available
*For additional marking information, refer to
Application Note AND8002/D.
MARKING
DIAGRAMS*
KL31
ALYWG
G
SOIC8
D SUFFIX
CASE 751
TSSOP8
DT SUFFIX
CASE 948R
1
8
1
8
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
DFN8
MN SUFFIX
CASE 506AA
2I
M
G
14
4T
M
G
14
HL31
ALYWG
G
1
8
(Note: Microdot may be in either location)
H = MC10
K = MC100
4T = MC10
2I = MC100
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
M = Date Code
G = PbFree Package
KEL31
ALYW
G
1
8
1
8
HEL31
ALYW
G
1
8
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