參數資料
| 型號： | MC100EL33DTG |
| 廠商： | ON Semiconductor |
| 文件頁數： | 1/10頁 |
| 文件大小： | 0K |
| 描述： | IC DIVIDER DIV X4 ECL DFF 8TSSOP |
| 標準包裝： | 100 |
| 系列： | 100EL |
| 邏輯類型： | 除以 4 |
| 元件數： | 1 |
| 每個元件的位元數： | 1 |
| 復位： | 異步 |
| 計數速率： | 4.2GHz |
| 觸發器類型： | 正，負 |
| 電源電壓： | 4.2 V ~ 5.7 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 8-TSSOP |
| 包裝： | 管件 |
| 其它名稱： | MC100EL33DTGOS |
Semiconductor Components Industries, LLC, 2008
August, 2008 Rev. 10
1
Publication Order Number:
MC10EL33/D
MC10EL33, MC100EL33
5VECL ÷4 Divider
Description
The MC10EL/100EL33 is an integrated
÷4 divider. The differential
clock inputs and the VBB allow a differential, single-ended or AC coupled
interface to the device. The VBB pin, an internally generated voltage
supply, is available to this device only. For single-ended input conditions,
the unused differential input is connected to VBB as a switching reference
voltage. VBB may also rebias AC coupled inputs. When used, decouple
VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.
The reset pin is asynchronous and is asserted on the rising edge. Upon
power-up, the internal flip-flops will attain a random state; the reset allows
for the synchronization of multiple EL33’s in a system.
The 100 Series contains temperature compensation.
Features
650 ps Propagation Delay
4.0 GHz Toggle Frequency
ESD Protection: Human Body Model; > 1 kV,
Machine Model; > 100 V
PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V with VEE = 4.2 V to 5.7 V
Internal Input Pulldown Resistors on CLK(s) and R.
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V0 @ 0.125 in,
Oxygen Index: 28 to 34
Transistor Count = 95 devices
PbFree Packages are Available
Figure 1. Logic Diagram and Pinout Assignment
4
3
1
2
5
6
7
8
Q
VEE
VCC
Q
CLK
VBB
R
÷4
Reset
CLK
*For additional marking information, refer to
Application Note AND8002/D.
MARKING
DIAGRAMS*
KL33
ALYWG
G
SOIC8
D SUFFIX
CASE 751
1
8
TSSOP8
DT SUFFIX
CASE 948R
1
8
1
8
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
KEL33
ALYW
G
1
8
DFN8
MN SUFFIX
CASE 506AA
2K
M
G
14
4V
M
G
14
HL33
ALYWG
G
1
8
HEL33
ALYW
G
1
8
(Note: Microdot may be in either location)
H = MC10
K = MC100
4V = MC10
2K = MC100
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
M = Date Code
G = PbFree Package
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MC100EL33DTR2 | 功能描述:時鐘驅動器及分配 5V ECL Divide RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MC100EL33DTR2G | 功能描述:時鐘驅動器及分配 5V ECL Divide By 4 Divider RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MC100EL33MNR4 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:5V ECL ±4 Divider |
| MC100EL33MNR4G | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:5V ECL ±4 Divider |
| MC100EL34 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:5V ECL ±2, ±4, ±8 Clock Generation Chip |
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