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參數資料
| 型號： | MC100EP016AFAR2 |
| 廠商： | ON Semiconductor |
| 文件頁數： | 13/13頁 |
| 文件大小： | 0K |
| 描述： | IC COUNTER 8BIT SYNC ECL 32LQFP |
| 標準包裝： | 1 |
| 系列： | 100EP |
| 邏輯類型： | 二進制計數器 |
| 方向： | 上 |
| 元件數： | 1 |
| 每個元件的位元數： | 8 |
| 復位： | 異步 |
| 計時： | 同步 |
| 計數速率： | 1.4GHz |
| 觸發器類型： | 正，負 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-LQFP |
| 供應商設備封裝： | 32-LQFP（7x7） |
| 包裝： | 剪切帶 (CT) |
| 其它名稱： | MC100EP016AFAOSCT |
MC100EP016A
http://onsemi.com
9
APPLICATIONS INFORMATION (continued)
H
L
H
LLL
H
TC
PE
CE
TCLD
CLK
P7
P6
P4
P3
P2
P1 P0
P5
Q7 Q6
Q4 Q3
Q2 Q1 Q0
Q5
Figure 5. Mod 2 to 256 Programmable Divider
CLK
COUT
To determine what value to load into the device to
accomplish the desired division, the designer simply
subtracts the binary equivalent of the desired divide ratio
from the binary value for 256. As an example for a divide
ratio of 113:
Pn's = 256 - 113 = 8F16 = 1000 1111
where:
P0 = LSB and P7 = MSB
Forcing this input condition as per the setup in Figure 5
will result in the waveforms of Figure 6. Note that the TC
output is used as the divide output and the pulse duration is
equal to a full clock period. For even divide ratios, twice the
desired divide ratio can be loaded into the EP016A and the
TC output can feed the clock input of a toggle flip flop to
create a signal divided as desired with a 50% duty cycle.
Table 9. Preset Values for Various Divide Ratios
Divide
Ratio
Preset Data Inputs
P7
P6
P5
P4
P3
P2
P1
P0
2
H
L
3
H
HHHH
L
H
4
H
HHHH
L
5
H
HHH
L
H
112
H
L
H
LLL
L
113
H
L
HHH
H
114
H
L
HHH
L
254
L
LLLL
H
L
255
L
LLLLL
H
256
L
A single EP016A can be used to divide by any ratio from
2 to 256 inclusive. If divide ratios of greater than 256 are
needed multiple EP016As can be cascaded in a manner
similar to that already discussed. When EP016As are
cascaded to build larger dividers the TCLD pin will no
longer provide a means for loading on terminal count.
Because one does not want to reload the counters until all of
the devices in the chain have reached terminal count,
external gating of the TC pins must be used for multiple
EP016A divider chains.
PE
CLK
TC
Load
DIVIDE BY 113
Load
1001 0000
1001 0001
1111 1100
1111 1101
1111 1110
1111 1111
Figure 6. Divide by 113 EP016A Programmable Divider Waveforms
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