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參數資料
| 型號： | MC100EP05DTR2G |
| 廠商： | ON Semiconductor |
| 文件頁數： | 8/11頁 |
| 文件大小： | 0K |
| 描述： | IC GATE AND/NAND ECL 2IN 8-TSSOP |
| 標準包裝： | 2,500 |
| 系列： | 100EP |
| 邏輯類型： | 與/與非門 |
| 電路數： | 1 |
| 輸入數： | 2 輸入（1，1） |
| 施密特觸發器輸入： | 無 |
| 輸出類型： | 差分 |
| 電源電壓： | 3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 8-TSSOP |
| 包裝： | 帶卷 (TR) |
MC10EP05, MC100EP05
http://onsemi.com
6
40°C
25°C
85°C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
15
25
32
17
27
36
19
28
38
mA
VOH
Output HIGH Voltage (Note 19)
1145 1020
895
1145 1020
895
1145 1020
895
mV
VOL
Output LOW Voltage (Note 19)
1945 1820 1695 1945 1820 1695 1945 1820 1695
mV
VIH
Input HIGH Voltage (SingleEnded)
1225
880
1225
880
1225
880
mV
VIL
Input LOW Voltage (SingleEnded)
1945
1625 1945
1625
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 20)
VEE+2.0
0.0
VEE+2.0
0.0
VEE+2.0
0.0
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
D
0.5
150
0.5
150
0.5
150
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
18.Input and output parameters vary 1:1 with VCC.
19.All loading with 50 W to VCC 2.0 V.
20.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 11. AC CHARACTERISTICS VCC = 0 V; VEE = 3.0 V to 5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 21)
40°C
25°C
85°C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
fmax
Maximum Frequency
(Figure 2)
> 3
GHz
tPLH,
tPHL
Propagation Delay to
Output Differential
160
210
260
170
220
270
210
260
320
ps
tJITTER
Random Clock Jitter
(Figure 2)
0.2
< 1
0.2
< 1
0.2
1.5
ps
VPP
Input Voltage Swing (Differential Con-
figuration)
150
800
1200
150
800
1200
150
800
1200
mV
tr
tf
Output Rise/Fall Times
Q
(20% 80%)
70
120
170
80
130
180
100
150
200
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
21.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC 2.0 V.
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