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參數資料
| 型號： | MC100EP52MNR4G |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | 3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
| 中文描述： | 100E SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, DSO8 |
| 封裝： | LEAD FREE, DFN-8 |
| 文件頁數： | 1/12頁 |
| 文件大小： | 168K |
| 代理商： | MC100EP52MNR4G |
Semiconductor Components Industries, LLC, 2006
December, 2006
Rev. 6
1
Publication Order Number:
MC10EP52/D
MC10EP52, MC100EP52
3.3V / 5VECL Differential
Data and Clock D FlipFlop
Description
The MC10EP/100EP52 is a differential data, differential clock D
flip
flop. The device is pin and functionally equivalent to the EL52
device.
Data enters the master portion of the flip
flop when the clock is
LOW and is transferred to the slave, and thus the outputs, upon a
positive transition of the clock. The differential clock inputs of the
EP52 allow the device to also be used as a negative edge triggered
device.
The EP52 employs input clamping circuitry so that under open input
conditions (pulled down to V
EE
) the outputs of the device will remain
stable.
The 100 Series contains temperature compensation.
Features
330 ps Typical Propagation Delay
Maximum Frequency
PECL Mode: V
CC
= 3.0 V to 5.5 V with V
EE
= 0 V
NECL Mode: V
CC
= 0 V with V
EE
=
3.0 V to
5.5 V
Open Input Default State
Safety Clamp on Inputs
Q Output Will Default LOW with Inputs Open or at V
EE
Pb
Free Packages are Available
4 GHz Typical
*For additional marking information, refer to
Application Note AND8002/D.
H
K
5T
3O
= MC10
= MC100
= MC10
= MC100
A
L
Y
W
M
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Date Code
= Pb
Free Package
(Note: Microdot may be in either location)
ALYW
HP52
ALYW
KP52
MARKING
DIAGRAMS*
SOIC
8
D SUFFIX
CASE 751
TSSOP
8
DT SUFFIX
CASE 948R
1
8
1
8
1
8
http://onsemi.com
1
8
HEP52
ALYW
1
8
KEP52
ALYW
1
8
DFN8
MN SUFFIX
CASE 506AA
5
1
4
3
1
4
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
ORDERING INFORMATION
相關PDF資料 |
PDF描述 |
|---|---|
| MC10EP52DG | 3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
| MC10EP52DR2G | 3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
| MC10EP52DTG | 3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
| MC10EP52DTR2G | 3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
| MC10EP52MNR4 | 3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MC100EP56 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:3.3V / 5VECL Dual Differential 2:1 Multiplexer |
| MC100EP56DR2G | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:3.3V / 5V ECL Dual Differential 2:1 Multiplexer |
| MC100EP56DT | 功能描述:編碼器、解碼器、復用器和解復用器 3.3V/5V ECL Dual RoHS:否 制造商:Micrel 產品:Multiplexers 邏輯系列:CMOS 位數: 線路數量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| MC100EP56DTG | 功能描述:編碼器、解碼器、復用器和解復用器 3.3V/5V ECL Dual Diff 2:1 Mux RoHS:否 制造商:Micrel 產品:Multiplexers 邏輯系列:CMOS 位數: 線路數量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| MC100EP56DTG | 制造商:ON Semiconductor 功能描述:ICLOGIC MUXDUAL2-INPUTECL100TSSOP2 |
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