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參數(shù)資料
型號: MC100ES8223TC
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: 100E SERIES, LOW SKEW CLOCK DRIVER, 22 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64
封裝: PLASTIC, LQFP-64
文件頁數(shù): 1/8頁
文件大小: 447K
代理商: MC100ES8223TC
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order Number: MC100ES8223/D
Rev 0, 11/2001
Motorola, Inc. 2001
Preliminary Information
Low Voltage 1:22 Differential
HSTL Clock Fanout Buffer
The Motorola MC100ES8223 is a bipolar monolithic differential clock
fanout buffer. Designed for the most demanding clock distribution
systems, the MC100ES8223 supports various applications that require
the distribution of precisely aligned differential clock signals. Using SiGe
technology and a fully differential architecture, the device offers very low
skew outputs and superior digital signal characteristics. Target
applications for this clock driver are high performance clock distribution in
computing, networking and telecommunication systems.
Features
1:22 differential clock fanout buffer
50 ps maximum device skew1
SiGe technology
Supports DC to 800 MHz operation1 of clock or data signals
1.5V HSTL compatible differential clock outputs
PECL and HSTL compatible differential clock inputs
3.3V power supply for device core, 1.5V or 1.8V HSTL output supply
Standard 64 lead LQFP package with exposed pad for enhanced
thermal characteristics
Supports industrial temperature range
Pin and function compatible to the MC100EP223
Functional Description
The MC100ES8223 is designed for low skew clock distribution
systems and supports clock frequencies up to 800 MHz1. The device
accepts two clock sources. The HCLK input can be driven by HSTL
compatible signals, the PCLK input accepts PECL compatible signals.
The selected input signal is distributed to 22 identical, differential HSTL
outputs.
In order to meet the tight skew specification of the device, both outputs of a differential output pair should be terminated, even if
only one output is used. In the case where not all 22 outputs are used, the output pairs on the same package side as the parts
being used on that side should be terminated.
The HSTL compatible output levels are generated with an open emitter architecture. This minimizes part–to–part and
output–to–output skew. The open-emitter outputs require a 50
DC termination to GND (0V). The output supply voltage can be
either 1.5V or 1.8V, the core voltage supply is 3.3V. The output enable (OE) is synchronous so that the outputs will only be
enabled/disabled when they are already in the LOW state. In the case of an asynchronous control, there is a chance of
generating a ‘runt’ clock pulse when the device is enabled/disabled.
The MC100ES8223 is pin and function compatible to the MC100EP223.
1. AC specifications are design targets and subject to change
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
MC100ES8223
LOW–VOLTAGE
1:22 DIFFERENTIAL HSTL
CLOCK FANOUT DRIVER
TC SUFFIX
64–LEAD LQFP PACKAGE
EXPOSED PAD
CASE 840K
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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DATA SHEET
MC100ES8223
IDT Low Voltage 1:22 Differential HSTL Clock Fanout Buffer
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MC100ES8223
1
Low Voltage 1:22 Differential HSTL
Clock Fanout Buffer
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