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參數資料
| 型號： | MC100LVELT23DR2 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | 3.3 V Dual Differential LVPECL/LVDS to LVTTL Translator |
| 中文描述： | DUAL PECL TO TTL TRANSLATOR, TRUE OUTPUT, PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁數： | 1/8頁 |
| 文件大小： | 66K |
| 代理商： | MC100LVELT23DR2 |
Semiconductor Components Industries, LLC, 2005
February, 2005 Rev. 12
1
Publication Order Number:
MC100LVELT23/D
MC100LVELT23
3.3 VDual Differential
LVPECL/LVDS to LVTTL
Translator
The MC100LVELT23 is a dual differential LVPECL/LVDS to
LVTTL translator. Because LVPECL (Positive ECL) or LVDS levels
are used only +3.3 V and ground are required. The small outline 8-lead
package and the dual gate design of the LVELT23 makes it ideal for
applications which require the translation of a clock and a data signal.
The LVELT23 is available in only the ECL 100K standard. Since
there are no LVPECL outputs or an external V
BB
reference, the
LVELT23 does not require both ECL standard versions. The LVPECL
inputs are differential. Therefore, the MC100LVELT23 can accept any
standard differential LVPECL input referenced from a V
CC
of +3.3 V.
2.0 ns Typical Propagation Delay
Maximum Frequency > 180 MHz
Differential LVPECL Inputs
PECL Mode Operating Range:V
CC
= 3.0 V to 3.8 V
with GND = 0 V
24 mA LVTTL Outputs
Flow Through Pinouts
Internal Pulldown and Pullup Resistors
PbFree Package is Available
*For additional marking information, refer to
Application Note AND8002/D.
SOIC8
D SUFFIX
CASE 751
MARKING
DIAGRAMS*
TSSOP8
DT SUFFIX
CASE 948R
A
L
Y
W
= Assembly Location
= Wafer Lot
= Year
= Work Week
1
8
1
8
ALYW
KR23
1
8
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
KVT23
ALYW
1
8
相關PDF資料 |
PDF描述 |
|---|---|
| MC100LVELT23DR2G | 3.3 V Dual Differential LVPECL/LVDS to LVTTL Translator |
| MC100LVELT23DG | 3.3 V Dual Differential LVPECL/LVDS to LVTTL Translator |
| MC100LVELT23DT | Replaced by TPS2052B : 0.7A, 2.7-5.5V Dual (1In/ 2Out) Hi-Side MOSFET, Fault Report, Act-High Enable 8-SOIC 0 to 85 |
| MC100LVELT23DTR2 | Replaced by TPS2052B : 0.7A, 2.7-5.5V Dual (1In/ 2Out) Hi-Side MOSFET, Fault Report, Act-High Enable 8-SOIC 0 to 85 |
| MC100LVELT23D | 3.3 V Dual Differential LVPECL/LVDS to LVTTL Translator |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MC100LVELT23DR2G | 功能描述:轉換 - 電壓電平 3.3V Dual Diff LVPECL to LVTTL RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
| MC100LVELT23DT | 功能描述:轉換 - 電壓電平 3.3V Dual Diff RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
| MC100LVELT23DTG | 功能描述:轉換 - 電壓電平 3.3V Dual Diff LVPECL to LVTTL RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
| MC100LVELT23DTR2 | 功能描述:轉換 - 電壓電平 3.3V Dual Diff RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
| MC100LVELT23DTRG | 功能描述:轉換 - 電壓電平 3.3V Dual Diff LVPECL to LVTTL RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
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