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參數(shù)資料
| 型號： | MC100LVEP16DR2G |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | 2.5V / 3.3V ECL Differential Receiver/Driver |
| 中文描述： | LINE TRANSCEIVER, PDSO8 |
| 封裝： | LEAD FREE, SOIC-8 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大小： | 172K |
| 代理商： | MC100LVEP16DR2G |
Semiconductor Components Industries, LLC, 2006
December, 2006
Rev. 10
1
Publication Order Number:
MC10LVEP16/D
MC10LVEP16, MC100LVEP16
2.5V / 3.3VECL Differential
Receiver/Driver
Description
The MC10/100LVEP16 is a world class differential receiver/driver.
The device is functionally equivalent to the EL16, EP16 and LVEL16
devices. With output transition times significantly faster than the EL16
and LVEL16, the LVEP16 is ideally suited for interfacing with high
frequency and low voltage (2.5 V) sources. Single
ended CLK input
operation is limited to a V
CC
3.0 V in PECL mode, or V
EE
in NECL mode.
The V
BB
pin, an internally generated voltage supply, is available to
this device only. For single
ended input conditions, the unused
differential input is connected to V
BB
as a switching reference voltage.
V
BB
may also rebias AC coupled inputs. When used, decouple V
BB
and V
CC
via a 0.01 F capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, V
BB
should be left open.
The 100 Series contains temperature compensation.
3.0 V
Features
240 ps Propagation Delay
Maximum Frequency > 4 GHz Typical
PECL Mode Operating Range: V
CC
= 2.375 V to 3.8 V
with V
EE
= 0 V
NECL Mode Operating Range: V
CC
= 0 V
with V
EE
=
2.375 V to
3.8 V
V
BB
Output
Open Input Default State
LVDS Input Compatible
Pb
Free Packages are Available
*For additional marking information, refer to
Application Note AND8002/D.
H
K
5Y = MC10
4L = MC100
M
= Date Code
(Note: Microdot may be in either location)
= MC10
= MC100
A = Assembly Location
L
= Wafer Lot
Y = Year
W = Work Week
= Pb
Free Package
MARKING DIAGRAMS*
HU16
ALYW
KU16
ALYW
SOIC
8
D SUFFIX
CASE 751
TSSOP
8
DT SUFFIX
CASE 948R
1
8
1
8
1
8
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
ORDERING INFORMATION
1
8
HVP16
ALYW
1
8
KVP16
ALYW
1
8
DFN8
MN SUFFIX
CASE 506AA
5
1
4
4
1
4
相關(guān)PDF資料 |
PDF描述 |
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| MC100LVEP16MNR4 | 2.5V / 3.3V ECL Differential Receiver/Driver |
| MC100LVEP16MNR4G | 2.5V / 3.3V ECL Differential Receiver/Driver |
| MC10LVEP16DG | 2.5V / 3.3V ECL Differential Receiver/Driver |
| MC10LVEP16DR2G | 2.5V / 3.3V ECL Differential Receiver/Driver |
| MC10LVEP16DTG | 2.5V / 3.3V ECL Differential Receiver/Driver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC100LVEP16DT | 功能描述:總線收發(fā)器 2.5V/3.3V ECL Diff RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| MC100LVEP16DTG | 功能描述:總線收發(fā)器 2.5V/3.3V ECL Diff RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| MC100LVEP16DTG | 制造商:ON Semiconductor 功能描述:BUFFER / DRIVER / RECEIVER LOGIC IC |
| MC100LVEP16DTR2 | 功能描述:總線收發(fā)器 2.5V/3.3V ECL Diff RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| MC100LVEP16DTR2G | 功能描述:總線收發(fā)器 2.5V/3.3V ECL Diff RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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