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參數資料
| 型號： | MC10109L |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Replaced by SN54LS132 : Quadruple 2-Input Positive-NAND Schmitt Triggers 14-CDIP -55 to 125 |
| 中文描述： | 10K SERIES, DUAL 5-INPUT OR/NOR GATE, CDIP16 |
| 封裝： | CERAMIC, DIP-16 |
| 文件頁數： | 1/5頁 |
| 文件大?。?/td> | 100K |
| 代理商： | MC10109L |
SEMICONDUCTOR TECHNICAL DATA
3–35
REV 5
Motorola, Inc. 1996
3/93
The MC10109 is a dual 4–5 input OR/NOR gate.
PD= 30 mW typ/gate (No Load)
tpd= 2.0 ns typ
tr, tf= 2.0 ns typ (20%–80%)
LOGIC DIAGRAM
VCC1= PIN 1
VCC2= PIN 16
VEE= PIN 8
6
7
9
5
3
2
4
12
13
10
11
14
15
DIP
PIN ASSIGNMENT
VCC1
AOUT
AOUT
AIN
AIN
AIN
AIN
VEE
VCC2
BOUT
BOUT
BIN
BIN
BIN
BIN
BIN
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
相關PDF資料 |
PDF描述 |
|---|---|
| MC10109P | Hex Schmitt-trigger Inverters 14-CDIP -55 to 125 |
| MC10110L | Hex Schmitt-trigger Inverters 14-CDIP -55 to 125 |
| MC10110P | Hex Schmitt-trigger Inverters 14-CFP -55 to 125 |
| MC10111L | Replaced by SN54LS148 : 10-Line To 4-Line And 8-Line To 3-Line Priority Encoders 16-CDIP -55 to 125 |
| MC10111 | Dual 3-Input/3-Output NOR Gate |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MC10109L WAF | 制造商:ON Semiconductor 功能描述: |
| MC10109LDS | 制造商:Motorola Inc 功能描述:Electronic Component |
| MC10109P | 制造商:ON Semiconductor 功能描述:OR/NOR Gate 2-Element 4-5-IN ECL 16-Pin PDIP Rail 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC10109P 91 | 制造商:Motorola 功能描述:10109N |
| MC10109P91 | 制造商:Motorola 功能描述:10109N |
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