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參數(shù)資料
| 型號(hào)： | MC10117P |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Quadruple 2-Line To 1-Line Data Selectors/Multiplexers 16-CDIP -55 to 125 |
| 中文描述： | 10K SERIES, DUAL 5-INPUT OR-AND/OR-AND-INVERT GATE, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大小： | 104K |
| 代理商： | MC10117P |
SEMICONDUCTOR TECHNICAL DATA
3–68
REV 5
Motorola, Inc. 1996
3/93
The MC10117 is a dual 2–wide 2–3–input OR–AND/OR–AND–Invert gate.
This general purpose logic element is designed for use in data control, such as
digital multiplexing or data distribution. Pin 9 is common to both gates.
PD= 100 mW typ/pkg (No Load)
tpd= 2.3 ns typ
tr, tf= 2.2 ns typ (20%–80%)
LOGIC DIAGRAM
VCC1= PIN 1
VCC2= PIN 16
VEE= PIN 8
12
13
11
10
9
7
6
5
4
3
2
14
15
DIP
PIN ASSIGNMENT
VCC1
AOUT
AOUT
A1IN
A1IN
A2IN
A2IN
VEE
VCC2
BOUT
BOUT
B1IN
B1IN
B2IN
B2IN
A2IN, B2IN
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
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相關(guān)代理商/技術(shù)參數(shù) |
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| MC-10118B | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:MULTIMEDIA PROCESSOR FOR MOBILE APPLICATIONS |
| MC-10118BF1-ENY-A | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:MULTIMEDIA PROCESSOR FOR MOBILE APPLICATIONS |
| MC10118PDS 88 | 制造商:Motorola 功能描述:10118N |
| MC10118PDS88 | 制造商:Motorola 功能描述:10118N |
| MC10119P | 制造商:Motorola Inc 功能描述: |
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