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參數資料
| 型號： | MC10154P |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 計數器 |
| 英文描述： | 10K SERIES, ASYN POSITIVE EDGE TRIGGERED 4-BIT DOWN BINARY COUNTER, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數： | 1/3頁 |
| 文件大小： | 51K |
| 代理商： | MC10154P |
Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 6
340
Publication Order Number:
MC10154/D
MC10154
Binary Counter
The MC10154 is a four–bit counter capable of divide–by–two,
divide–by– four, divide–by–eight or a divide–by–sixteen function.
Clock inputs trigger on the positive going edge of the clock pulse.
Set and Reset inputs override the clock, allowing asynchronous “set”
or “clear.” Individual Set and common Reset inputs are provided, as
well as complemen– tary outputs for the first and fourth bits. True
outputs are available at all bits.
PD=370 mW typ/pkg (No Load)
ftoggle=150 MHz (typ)
tpd=3.5 ns typ (C to Q0)
tpd=11 ns typ (C to Q3)
LOGIC DIAGRAM
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
11
S0
Q0
14
9
10
12
Clock 1
Clock 2
Reset
D
C1
C2
R
Q
’
Q
’
Q
S
15
7
S1
Q1
D
C1
R
Q
’
Q
’
S
13
6
S2
Q2
D
C1
R
Q
’
Q
’
S
4
5
S3
Q3
3
D
C1
R
Q
’
Q
S
2
TRUTH TABLE
INPUTS
OUTPUTS
R
S0
S1
S2
S3
C1
C2
Q0
Q1
Q2
Q3
H
L
H
L
H
L
H
L
H
X
L
H
L
H
L
H
L
H
L
H
X
H
No Count
L
*
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
* Clock transitions from VIL to VIH may be applied to C1 or C2
or both for same effect.
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
MC10154L
CDIP–16
25 Units / Rail
MC10154P
PDIP–16
25 Units / Rail
MC10154FN
PLCC–20
46 Units / Rail
MARKING
DIAGRAMS
1
16
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
CDIP–16
L SUFFIX
CASE 620
MC10154L
AWLYYWW
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
10154
AWLYYWW
1
16
MC10154P
AWLYYWW
DIP PIN ASSIGNMENT
VCC1
Q3
Q2
S3
S2
S1
VEE
VCC2
Q0
Q1
CLOCK 1
S0
CLOCK 2
RESET
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables
on page 18.
VIH
VIL
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