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參數資料
| 型號： | MC10E193FNR2 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 算術邏輯單元 |
| 英文描述： | 10E SERIES, 8-BIT ERROR DETECT AND CORRECT CKT, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數： | 1/8頁 |
| 文件大小： | 69K |
| 代理商： | MC10E193FNR2 |
Semiconductor Components Industries, LLC, 2000
October, 2000 – Rev. 4
1
Publication Order Number:
MC10E193/D
MC10E193, MC100E193
5VECL Error Detection/
Correction Circuit
The MC10E/100E193 is an error detection and correction (EDAC)
circuit. Modified Hamming parity codes are generated on an 8-bit
word according to the pattern shown in the logic symbol. The P5
output gives the parity of the whole word. The word parity is also
provided at the PGEN pin, after Odd/Even parity control and gating
with the BPAR input. This output also feeds to a 1-bit shiftable
register, for use as part of a scan ring.
Used in conjunction with 12-bit parity generators such as the E160,
a SECDED (single error correction, double error detection) error
system can be designed for a multiple of an 8-bit word.
The 100 Series contains temperature compensation.
Hamming Code Generation
8-Bit Word, Expandable
Provides Parity of Whole Word
Scannable Parity Register
PECL Mode Operating Range: V
CC= 4.2 V to 5.7 V
with VEE= 0 V
NECL Mode Operating Range: V
CC= 0 V
with VEE= –4.2 V to –5.7 V
Internal Input Pulldown Resistors
ESD Protection: > 1 KV HBM, > 75 V MM
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL–94 code V–0 @ 1/8”,
Oxygen Index 28 to 34
Transistor Count = 368 devices
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
MC10E193FN
PLCC–28
37 Units/Rail
MC10E193FNR2
PLCC–28
500 Units/Reel
MC100E193FN
PLCC–28
37 Units/Rail
MC100E193FNR2
PLCC–28
500 Units/Reel
MARKING
DIAGRAMS
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
PLCC–28
FN SUFFIX
CASE 776
MC10E193FN
AWLYYWW
MC100E193FN
AWLYYWW
1
28
1
28
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