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參數資料
| 型號： | MC10EL34 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | 5V ECL ÷2、÷4、÷ 6 Clock Generation Chip(5V ECL ÷2、÷4、÷ 6 時鐘發生器芯片) |
| 中文描述： | 5V的ECL ÷ 2，÷ 4，÷ 6時鐘發生器芯片（5V的ECL ÷ 2，÷ 4，÷ 6時鐘發生器芯片） |
| 文件頁數： | 1/8頁 |
| 文件大小： | 153K |
| 代理商： | MC10EL34 |
Semiconductor Components Industries, LLC, 2005
November, 2005
Rev. 9
1
Publication Order Number:
MC10EL34/D
MC10EL34, MC100EL34
5VECL
÷
2,
÷
4,
÷
8 Clock
Generation Chip
Description
The MC10/100EL34 is a low skew
÷
2,
÷
4,
÷
8 clock generation chip
designed explicitly for low skew clock generation applications. The
internal dividers are synchronous to each other, therefore, the common
output edges are all precisely aligned. The V
BB
pin, an internally
generated voltage supply, is available to this device only. For
single-ended input conditions, the unused differential input is
connected to V
BB
as a switching reference voltage. V
BB
may also
rebias AC coupled inputs. When used, decouple V
BB
and V
CC
via a
0.01 F capacitor and limit current sourcing or sinking to 0.5 mA.
When not used, V
BB
should be left open.
The common enable (EN) is synchronous so that the internal
dividers will only be enabled/disabled when the internal clock is
already in the LOW state. This avoids any chance of generating a runt
clock pulse on the internal clock when the device is enabled/disabled
as can happen with an asynchronous control. An internal runt pulse
could lead to losing synchronization between the internal divider
stages. The internal enable flip
flop is clocked on the falling edge of
the input clock, therefore, all associated specification limits are
referenced to the negative edge of the clock input.
Upon startup, the internal flip-flops will attain a random state; the
master reset (MR) input allows for the synchronization of the internal
dividers, as well as multiple EL34s in a system.
The 100 Series contains temperature compensation.
Features
50 ps Output-to-Output Skew
Synchronous Enable/Disable
Master Reset for Synchronization
PECL Mode Operating Range:
V
CC
= 4.2 V to 5.7 V with V
EE
= 0 V
NECL Mode Operating Range:
V
CC
= 0 V with V
EE
=
4.2 V to
5.7 V
Internal Input 75 k Pulldown Resistors on CLK(s), EN, and MR
Pb
Free Packages are Available*
*For additional information on our Pb
Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
SO
16
D SUFFIX
CASE 751B
1
16
MARKING DIAGRAMS*
1
16
10EL34G
AWLYWW
A
WL
YY
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb
Free Package
1
16
100EL34G
AWLYWW
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
ORDERING INFORMATION
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| MC10ELT20 | 5VTTL to Differential PECL Translator(5VTTL到差分PECL轉換器) |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MC10EL34D | 功能描述:時鐘發生器及支持產品 5V ECL Clock RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MC10EL34DG | 功能描述:時鐘發生器及支持產品 5V ECL Clock Generator RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MC10EL34DR2 | 功能描述:時鐘發生器及支持產品 5V ECL Clock RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MC10EL34DR2G | 功能描述:時鐘發生器及支持產品 5V ECL Clock Generator RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MC10EL35D | 功能描述:觸發器 5V ECL JK-Type RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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