Table 10. 100EP DC CHARACTERISTICS, NECL VCC " />

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參數資料
型號: MC10EP105FAG
廠商: ON Semiconductor
文件頁數: 9/11頁
文件大?。?/td> 0K
描述: IC AND/NAND QUAD 2INP ECL 32LQFP
標準包裝: 250
系列: 10EP
邏輯類型: 與/與非門
電路數: 4
輸入數: 8 輸入(2,2,2,2)
施密特觸發器輸入:
輸出類型: 差分
電源電壓: 3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-LQFP
供應商設備封裝: 32-LQFP(7x7)
包裝: 托盤
其它名稱: MC10EP105FAGOS
MC10EP105, MC100EP105
http://onsemi.com
7
Table 10. 100EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = 5.5 V to 3.0 V (Note 17)
40°C
25°C
85°C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
VCC = 3.3 V
VCC = 5.0 V
45
59
63
80
45
62
66
85
45
65
69
85
mA
VOH
Output HIGH Voltage (Note 18)
1145 1020
895
1145 1020
895
1145 1020
895
mV
VOL
Output LOW Voltage (Note 18)
1945 1820 1695 1945 1820 1695 1945 1820 1695
mV
VIH
Input HIGH Voltage (SingleEnded)
1225
880
1225
880
1225
880
mV
VIL
Input LOW Voltage (SingleEnded)
1945
1625 1945
1625
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 19)
VEE+2.0
0.0
VEE+2.0
0.0
VEE+2.0
0.0
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
17.Input and output parameters vary 1:1 with VCC.
18.All loading with 50 W to VCC 2.0 V.
19.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 11. AC CHARACTERISTICS VCC = 0 V; VEE = 3.0 V to 5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 20)
40°C
25°C
85°C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
fmax
Maximum Frequency
(See Figure 4 Fmax/JITTER)
> 3
GHz
tPLH,
tPHL
Propagation Delay to
Output Differential
175
250
325
200
275
350
225
300
375
ps
tSKEW
Within Device Skew
Device to Device Skew (Note 21)
10
50
10
50
15
50
ps
tJITTER
CycletoCycle Jitter
(See Figure 4 Fmax/JITTER)
0.2
< 1
0.2
< 1
0.2
< 1
ps
VPP
Input Voltage Swing
(Differential Configuration)
150
800
1200
150
800
1200
150
800
1200
mV
tr
tf
Output Rise/Fall Times
Q
(20% 80%)
100
150
200
120
170
220
150
200
250
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
20.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC 2.0 V.
21.Skew is measured between outputs under identical transitions.
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