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參數資料
| 型號： | MC10EP142MNR4G |
| 廠商： | ON Semiconductor |
| 文件頁數： | 1/13頁 |
| 文件大小： | 0K |
| 描述： | IC SHIFT REGISTER 9BIT ECL 32QFN |
| 標準包裝： | 1,000 |
| 系列： | 10EP |
| 邏輯類型： | 移位寄存器 |
| 輸出類型： | 標準 |
| 元件數： | 1 |
| 每個元件的位元數： | 9 |
| 功能： | 通用 |
| 電源電壓： | 3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 32-QFN（5x5） |
| 包裝： | 帶卷 (TR) |
Semiconductor Components Industries, LLC, 2006
November, 2006 Rev. 16
1
Publication Order Number:
MC10EP142/D
MC10EP142, MC100EP142
3.3 V / 5 VECL 9Bit Shift
Register
The MC10EP/100EP142 is a 9bit shift register, designed with
byte-parity applications in mind. The MC10/100EP142 is capable of
performing serial/parallel data into serial/parallel out and shifting in
only one direction. The nine inputs D0 D8 accept parallel input data,
while SIN accepts serial input data. The QT0:87 outputs do not need
to be terminated for the shift operation to function. To minimize
power, any Q output not used should be left unterminated.
The SEL (Select) input pin is used to switch between the two modes
of operation SHIFT and LOAD. The shift direction is from Bit 0 to
Bit 8. Input data is accepted by the registers a setup time before the
positive going edge of CLK0 or CLK1; shifting is also accomplished
on the positive clock edge. A HIGH on the Master Reset pin (MR)
asynchronously resets all the registers to zero, overriding CLK0 and
CLK1 inputs.
The 100 Series contains temperature compensation.
Features
Shift Frequency >2.8 GHz (Typical)
9-Bit for ByteParity Applications
Asynchronous Master Reset
Dual Clocks
PECL Mode Operating Range: VCC = 3.0 V to 5.5 V
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = 3.0 V to 5.5 V
Open Input Default State
Safety Clamp on Inputs
PbFree Packages are Available
LQFP32
FA SUFFIX
CASE 873A
MARKING
DIAGRAM*
*For additional marking information, refer to
Application Note AND8002/D.
1
32
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
ORDERING INFORMATION
xxx
= 10 or 100
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
G or G = PbFree Package
MCxxx
EP142
AWLYYWWG
QFN32
MN SUFFIX
CASE 488AM
32
1
MCxxx
EP142
AWLYYWWG
G
1
(Note: Microdot may be in either location)
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相關代理商/技術參數 |
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|---|---|
| MC10EP16D | 功能描述:總線收發器 3.3V/5V ECL Diff RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| MC10EP16DG | 功能描述:總線收發器 3.3V/5V ECL Diff Line RCVR RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| MC10EP16DG | 制造商:ON Semiconductor 功能描述:GATE / INVERTER LOGIC IC |
| MC10EP16DR2 | 功能描述:總線收發器 3.3V/5V ECL Diff RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| MC10EP16DR2G | 功能描述:總線收發器 3.3V/5V ECL Diff Line RCVR RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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