
MC10EP445, MC100EP445
http://onsemi.com
7
100EP DC CHARACTERISTICS, NECL
V
CC
= 0 V, V
EE
= -5.5 V to -3.0 V (Note 21)
-40
°
C
25
°
C
85
°
C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
I
EE
Power Supply Current (Note 22)
95
119
143
98
122
146
100
125
150
mA
V
OH
Output HIGH Voltage (Note 23)
-1145
-1020
-895
-1145
-1020
-895
-1145
-1020
-895
mV
V
OL
Output LOW Voltage (Note 23)
-1945
-1820
-1695
-1945
-1820
-1695
-1945
-1820
-1695
mV
V
IH
Input HIGH Voltage (Single-Ended)
-1225
-880
-1225
-880
-1225
-880
mV
V
IL
Input LOW Voltage (Single-Ended)
-1945
-1625
-1945
-1625
-1945
-1625
mV
V
BB
Output Voltage Reference
-1525
-1425
-1325
-1525
-1425
-1325
-1525
-1425
-1325
mV
V
IHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 24)
V
EE
+ 2.0
0.0
V
EE
+ 2.0
0.0
V
EE
+ 2.0
0.0
V
I
IH
Input HIGH Current
150
150
150
A
I
IL
Input LOW Current
0.5
0.5
0.5
A
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.
21.Input and output parameters vary 1:1 with V
CC
.
22.Required 500 lfpm air flow when using -5 V power supply. For (V
CC
- V
EE
) > 3.3 V, 5 to 10 in line with V
EE
required for maximum thermal
protection at elevated temperatures. Recommend V
CC
-V
EE
operation at
23.All loading with 50 to V
CC
- 2.0 volts.
24.V
min varies 1:1 with V
EE
, V
IHCMR
max varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the differential
input signal.
3.3 V.
AC CHARACTERISTICS
V
CC
= 0 V; V
EE
= -3.0 V to -5.5 V or V
CC
= 3.0 V to 5.5 V; V
EE
= 0 V (Note 25)
-40
°
C
25
°
C
85
°
C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
f
max
Maximum Input CLK Frequency
(See Figure 12. F
max
/JITTER)
CKSEL = LOW
CKSEL = HIGH
2.0
2.8
2.5
3.3
2.0
2.8
2.5
3.3
1.7
2.8
2.2
3.3
GHz
t
PLH
,
t
PHL
Propagation Delay to
Output Differential
CLK to Q
CLK TO PCLK
1230
1000
1450
1240
1660
1490
1300
1050
1530
1310
1760
1580
1400
1140
1650
1420
1900
1710
ps
ts
Setup Time
SINA, B+ TO CLK+ (Figure 4)
CKEN+ TO CLK- (Figure 5)
-300
100
-400
50
-300
100
-400
50
-300
100
-400
50
ps
t
h
Hold Time
CLK+ TO SINA, B- (Figure 4)
CLK- TO CKEN (Figure 5)
650
45
550
-35
675
45
575
-35
725
45
625
-35
ps
t
RR
/t
RR2
Reset Recovery (Figure 3)
350
180
350
180
350
180
ps
t
PW
Minimum Pulse Width
RESET
400
400
400
ps
t
JITTER
Cycle-to-Cycle Jitter
(See Figure 12. F
max
/JITTER)
PCLK
0.2
< 1
0.2
< 1
0.2
< 1
ps
V
PP
Input Voltage Swing (Differential)
(Note 26)
150
800
1200
150
800
1200
150
800
1200
mV
t
r
t
f
Output Rise/Fall Times
(20% - 80%)
Q
100
180
250
100
200
300
125
230
325
ps
25.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 to V
CC
- 2.0 V.
26.V
PP
(min) is the minimum input swing for which AC parameters are guaranteed.