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參數(shù)資料
| 型號(hào)： | MC14516BDR2 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類(lèi)： | 通用總線功能 |
| 英文描述： | Binary Up/Down Counter |
| 中文描述： | 4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁(yè)數(shù)： | 10/12頁(yè) |
| 文件大小： | 221K |
| 代理商： | MC14516BDR2 |
MC14516B
http://onsemi.com
10
Figure 4. Programmable Cascaded Frequency Divider
NOTE: The programmable frequency divider can be set by applying the desired divide ratio, in binary, to the preset inputs. For example,
the maximum divide ratio of 255 may be obtained by applying a 1111 1111 to the preset inputs P0 to P7. For this divide operation,
both counters should be configured in the count down mode. The divide ratio of zero is an undefined state and should be avoided.
BUFFER
f
out
M.S.D.
MC14516B
L.S.D.
MC14516B
THUMBWHEEL SWITCHES
(OPEN FOR “0”)
+V
DD
+V
DD
C
out
+V
DD
OPEN = COUNT
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q0
PE
Q1
Q2
Q3
P0
P1
P2
P3
P0
P1
P2
P3
R
U/D
CLOCK
C
in
C
out
Q0
PE
Q1
Q2
Q3
P0
P1
P2
P3
R
U/D
CLOCK
C
in
P4
P5
P6
P7
CLOCK (f
in
)
RESET
RESISTORS = 10 k
f
out
=
f
in
n
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