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參數資料
型號: MC14517BDWR2G
廠商: ON Semiconductor
文件頁數: 1/6頁
文件大小: 0K
描述: IC SHIFT REG DUAL 64BIT 16-SOIC
標準包裝: 1
系列: 4000B
邏輯類型: 移位寄存器
輸出類型: 標準
元件數: 2
每個元件的位元數: 64
功能: 串行至并行
電源電壓: 3 V ~ 18 V
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 16-SOIC W
包裝: 剪切帶 (CT)
其它名稱: MC14517BDWR2GOSCT
Semiconductor Components Industries, LLC, 2013
May, 2013 Rev. 8
1
Publication Order Number:
MC14517B/D
MC14517B
Dual 64-Bit Static Shift
Register
The MC14517B dual 64bit static shift register consists of two
identical, independent, 64bit registers. Each register has separate clock
and write enable inputs, as well as outputs at bits 16, 32, 48, and 64. Data
at the data input is entered by clocking, regardless of the state of the write
enable input. An output is disabled (open circuited) when the write enable
input is high. During this time, data appearing at the data input as well as
the 16bit, 32bit, and 48bit taps may be entered into the device by
application of a clock pulse. This feature permits the register to be loaded
with 64 bits in 16 clock periods, and also permits bus logic to be used.
This device is useful in time delay circuits, temporary memory storage
circuits, and other serial shift register applications.
Features
Diode Protection on All Inputs
Fully Static Operation
Output Transitions Occur on the Rising Edge of the Clock Pulse
Exceedingly Slow Input Transition Rates May Be Applied to the
Clock Input
3State Output at 64thBit Allows Use in Bus Logic Applications
Shift Registers of any Length may be Fully Loaded with 16 Clock
Pulses
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two LowPower TTL Loads or One LowPower
Schottky TTL Load Over the Rated Temperature Range
These Devices are PbFree and are RoHS Compliant
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECQ100
Qualified and PPAP Capable
MAXIMUM RATINGS (Voltages Referenced to VSS)
Parameter
Symbol
Value
Unit
DC Supply Voltage Range
VDD
0.5 to +18.0
V
Input or Output Voltage Range
(DC or Transient)
Vin, Vout
0.5 to VDD
+ 0.5
V
Input or Output Current (DC or Transient)
per Pin
Iin, Iout
±10
mA
Power Dissipation per Package (Note 1)
PD
500
mW
Operating Temperature Range
TA
55 to +125
°C
Storage Temperature Range
Tstg
65 to +150
°C
Lead Temperature (8Second Soldering)
TL
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW”
Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
highimpedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
Device
Package
Shipping
ORDERING INFORMATION
http://onsemi.com
MC14517BDWR2G
SO16
(PbFree)
1000/Tape & Reel
MC14517BDWG
SO16
(PbFree)
47 Units/Rail
MC14517BCPG
PDIP16
(PbFree)
500 Units/Rail
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G
= PbFree Package
MARKING
DIAGRAMS
PDIP16
P SUFFIX
CASE 648
16
1
MC14517BCP
AWLYYWWG
1
SO16
DW SUFFIX
CASE 751G
16
1
14517B
AWLYYWWG
1
PIN ASSIGNMENT
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
CB
WEB
Q48B
Q16B
VDD
DB
Q32B
Q64B
CA
WEA
Q48A
Q16A
VSS
Q32A
Q64A
DA
NLV14517BDWR2G
SO16
(PbFree)
1000/Tape & Reel
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