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參數(shù)資料
型號: MC14518B
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Dual Up Counters
中文描述: 雙柜位
文件頁數(shù): 1/8頁
文件大小: 174K
代理商: MC14518B
Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 3
1
Publication Order Number:
MC14518B/D
The MC14518B dual BCD counter and the MC14520B dual binary
counter are constructed with MOS P–channel and N–channel
enhancement mode devices in a single monolithic structure. Each
consists of two identical, independent, internally synchronous 4–stage
counters. The counter stages are type D flip–flops, with
interchangeable Clock and Enable lines for incrementing on either the
positive–going or negative–going transition as required when
cascading multiple stages. Each counter can be cleared by applying a
high level on the Reset line. In addition, the MC14518B will count out
of all undefined states within two clock periods. These complementary
MOS up counters find primary use in multi–stage synchronous or
ripple counting applications requiring low power dissipation and/or
high noise immunity.
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Internally Synchronous for High Internal and External Speeds
Logic Edge–Clocked Design — Incremented on Positive Transition
of Clock or Negative Transition on Enable
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
MAXIMUM RATINGS
(Voltages Referenced to V
SS
) (Note 2.)
Symbol
Parameter
Value
Unit
V
DD
DC Supply Voltage Range
–0.5 to +18.0
V
V
in
, V
out
Input or Output Voltage Range
(DC or Transient)
–0.5 to V
DD
+ 0.5
V
I
in
, I
out
Input or Output Current
(DC or Transient) per Pin
±
10
mA
P
D
Power Dissipation,
per Package (Note 3.)
500
mW
T
A
Operating Temperature Range
–55 to +125
°
C
T
stg
Storage Temperature Range
–65 to +150
°
C
T
L
Lead Temperature
(8–Second Soldering)
260
°
C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
(V
in
or V
out
)
V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V
SS
or V
DD
). Unused outputs must be left open.
http://onsemi.com
A
WL or L
YY or Y
WW or W = Work Week
= Assembly Location
= Wafer Lot
= Year
Device
Package
Shipping
ORDERING INFORMATION
MC14518BCP
PDIP–16
2000/Box
MC14518BDW
SOIC–16
47/Rail
MARKING
DIAGRAMS
16
1
PDIP–16
P SUFFIX
CASE 648
MC14518BCP
AWLYYWW
MC14518BDWR2
SOIC–16
1000/Tape & Reel
SOIC–16
DW SUFFIX
CASE 751G
1
16
14518B
AWLYYWW
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
SOEIAJ–16
F SUFFIX
CASE 966
1
16
MC14518B
AWLYWW
MC14518BF
SOEIAJ–16
See Note 1.
MC14518BFEL
SOEIAJ–16
See Note 1.
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PDF描述
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